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Message
From: tc27 at shaw.ca<tc27@s...>
Date: Thu Dec 30 10:58:24 CET 2004
Subject: [oc] RS232 WB Controller freezes on Xilinx FPGA
UPDATE:
After more experimentation, the core freezes all the time now. I
changed very few things, and re-synthesized the core. And now when
ever I synthesize it with or without using a global clock it freezes
after less then a minute. I still have an old (yesterdays) bit stream
file, that seems to work fine (I let it run for 3 hours without
problems). So I'm really confused. Is there some sort of synthesis
settings I'm not configuring that could be causing this sort of behaviour?
Thank you,
Mark
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