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Message
From: darcyrandall2004 at yahoo.com<darcyrandall2004@y...>
Date: Tue Dec 21 01:57:03 CET 2004
Subject: [oc] truth tables in VHDL
Im not completely sure what your paper is about, but perhaps this will
help. Some time ago I created a perl vhdl compiler. Basically he compiler
took a truth table, performed the quinMcluskey algorithm, then
determined one of many minimum sum of products implementations, then
created the architecture and entity in vhdl. If this helps, you can find
the compiler here.
www.geocties.com/darcyrandall2004
Hope this helps. Cheers
----- Original Message -----
From: sergio@k...<sergio@k...>
To:
Date: Fri Dec 17 14:09:08 CET 2004
Subject: [oc] truth tables in VHDL
> As part of my graduate paper, I'm analysing optimization of truth
> tables
> in RTL and it's impact on circuit size and performance. For that I
> ned to
> either make up or use existing RTL, preferably VHDL, with
> non-optimized
> truth table, medium size. I was trying to find some state machines
> on
> this site and others, but I was unsuccesful. Please contact me if
> you
> konw of some RTL that I could use.
> Sergio
>
>
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