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Message
From: bumkele at yahoo.fr<bumkele@y...>
Date: Wed Dec 1 15:24:17 CET 2004
Subject: [oc] Wishbone interface between two devices
HelloI have seen that the majority of the available IP cores are using the wishbone interface. But I must implement an ethernet MAC core (for example) in a FPGA with an external microprocessor. In fact, I only have a standard memory interface between my FPGA and the Microprocessor.
Is the Wishbone interface usable and How to interface the two components?
Thanks
Bumkele
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