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Message
From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@s...>
Date: Wed Dec 1 20:24:58 CET 2004
Subject: [oc] dbg_interface documentation
Hi,In the documentation of the debug interface on page 44, section 4.3.10.1 it
talks about reading from a slow cpu. Then it goes on to say: `Perform a
WRITE_COMMAND normally' and then it says to assert tms_i after the 36th bit has
been shift *out*. I'm guessing that `shifted out' is from the view-point of
jp2. If this is the case then these semantics reflect that of the READ_COMMAND.
So it seems like a this WRITE_COMMAND should really be READ_COMMAND. Is this
correct?
nog.
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