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Message
From: S.PRABHAKARAN.manjuprabhakar at rediffmail.com<S.PRABHAKARAN.manjuprabhakar@r...>
Date: Tue Aug 31 09:42:25 CEST 2004
Subject: [oc] Re:PCI/USB
----- Original Message ----- From: "jamil Isma'il khatib" <jamil.khatib@p...> To: cores@o... khatib@i... Date: Wed Jan 12 09:12:30 GMT 2000 Subject: [oc] Re:PCI/USB
> > > Subject: Re: PCI/USB > Date: Mon, 10 Jan 2000 14:05:28 > From: " " <mcjy@m...> > To: khatib@i... > CC: > > > Hi! > Thanks for your email. > For the PCI core project, I would > expect it take six months to get > a basic model. (Depending on how many > people. My estimation is 5 people) > It sounds like a very long time but > organising a project on the internet > is very different from normal project. > All of us have a full time job so > we can only spend around 6 to 10 hours > each week. > > ============================================== > First we do not have to count anyone in the project to work as full > time job or even as part time but as "spare time". > Also we have no time restriction although it is good idea to have a > fixed time schedule. > =============================================== > > I guess we can use one month to develop > the block diagrams and configuration > of the project (as you know, we will need > sometime for people to feedback) and > several generation of the block diagrams > would be developed in this month. Then > we will focus on the detail spec of each > block. We might need to think of some > of the interaction between block in the > early planning stage, but it really depends > on situation. > > Then we will need two month at least to > develop the block and then combine them > and carry out testing in simulation. > At this moment I still wonder how we > can test our design. I believe that the > prototyping board from Altera > > ============================== > Or even we can do a board for us > ================================= > > should be > very useful but if we want to do the > test in real circuit we will also need > to develop device driver. > > ====================================== > I agree the device driver should be an important part of our > project. > ====================================== > > > About the PCI specification : > I think we will work on PCI 2.2 > 64 bit extension is only one of the feature > support in PCI 2.x, but it is ok to develop > 32 bit core for PCI 2.2 (and I think it would > be much easier to start with). > > ====================================================== = > Iagree the first block should be PCI2.2 32bit controller > ====================================================== === > > > PCI specification said a device should > be able to run from 66MHz to 0MHz. > But the hardware performance requirment of > 66MHz system maybe too high (difficult to > prototype), so maybe we need to work on 33MHz > design first. > > PCI-X is 133MHz PCI. I don't know if its > specification is released yet. It is develop > by Compag, and a few other PC companies. > WIth current performance in FPGA, I guess > it is almost impossible for us to prototype. > > Compact PCI is based of PCI 2.x and it support
> hot swap. It have extra requirment on the
> pins implementation (the pins must be tristate
> during the hot swap process).
>
> ==============================
> I have a good link about PCI core at
> http://www.tkt.cs.tut.fi/~havu/pci/models.shtml
> ====================================
>
>
>
> I haven't look at USB yet.
> Write to you again later.
>
> Have a nice day.
>
> from
> Joe
>
>
> --
>
> On 10 Jan 00 09:33:15 Asia/T jamil khatib wrote:
> >Hi Joe,
> >I am so sorry but my email does not send emails but it receives
> I have to
> >check it.
> >Anyhow I have some suggestions and I am going to send it to all
> PCI members,
> >news group and opencores mailing list
> >
> >Please if you want to replay my email is khatib@i...
> >Thanks
> >
>
>
>=====================================================
========================
> >Hi,
> >Before we start the work in the cores design we have to define
> few things.
> >We should get information about PCI and USB standards and
> design tips ( I
> >posted few links the last time and I still looking for more) I
> hope once we
> >proved that we are able to develop a good system may be we can
> get some
> >support from the PCI or USB groups and I'll try to contact them
> so as to get
> >the specs or test suits.
> >Documentation: text files is the most portable format or latex
> can be used to
> >write our design documentation instead of the MS stuff that are
> not portable.
> >The project should be divided into small subprojects for
> example we could have
> >: the main controller, the optional blocks, the arbiter and
> test suite.
> >Development platform: we need to make our platform as much as
> possible generic
> >and platform independent and it will be excellent if we port it
> to many
> >platforms.
> >Project schedule:
> ?. defining the spec and the subprojects.
> ?. defining the functionality of the main blocks.
> >
> ?. defining the blocks interfaces.
> ?. defining the archs, the states and timing of the blocks
> ?. selecting some tools and platforms
> ?. design implementation.
> ?. verification
> ?. testing on real system
> >could you please comment on the schedule
> >as a first step we have to understand the diff between the
> available bus
> >standards (e.g. PCI64/66MHz, PCI-X, CompactPCI- USB v1 &
> USB v2) and all
> >optional and required features of the busses.
> >
> >Thanks
> >Jamil Khatib
> >OpenIP Organization http://www.openip.org
> >OpenIPCore Project http://www.openip.org/oc
> >OpenCores Project http://www.opencores.org
> >
> >
>
>
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>
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> jamil Isma'il khatib <jamil.khatib@p...>
>
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