LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: markus at reaaliaika.net<markus@r...>
    Date: Tue Aug 17 10:01:01 CEST 2004
    Subject: [oc] Parallel Array Processor Project
    Top
    [Forth Chip]
    > It was running at a 2 ns cycle on a 0.5 µm technology
    > (but need 4 cycles for an add).

    The speed of the single operations is not a problem. If my current
    thoughts are right, the parallelism easily overcomes that in the average
    cases.

    > It count around ~1000 transistors designed by hand.

    Sounds faschinating!

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.