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    From: markus at reaaliaika.net<markus@r...>
    Date: Mon Aug 16 13:55:35 CEST 2004
    Subject: [oc] Parallel Array Processor Project
    Top
    > markus@r... wrote:
    > > My area of intrest is MIMD and I'm very aware, that the
    > > architecture I'm currently planning won't beat SIMD-processors
    > > or systolic arrays in their strong area. That's not a target for
    > > the project; the target is to design architecture and tools
    > > for general purpose parallel processor.
    > >
    [...]
    > The problems I see with building massive MIMDs on anything (cabinet
    > or chip) is program model and communication.

    You're absolutely right here - the programming model is terrible. In the
    early 90's, when I was last time working on this project, I was
    convinced, that the difficultiness of programming makes the model
    unusable. And altought I now have over 10 years more experience of
    programming, including parallel systems, with a strong motivation for
    solving the thing, it's still hard and desperous mission.

    But, most of you are probably familiar with VHDL - that's one of the
    existing parallel languages and you probably know, that it's not
    impossible to make something usable with it, and it's even possible to
    make the code somewhat understandable, too.

    About the communication, it's a thing with which you just have to live, if
    you're designing massively parallel systems.

    > And esp for the
    > embedded/integrated thingy you don't want to have to resort to
    > MPI for you interprocessor communication.

    Maybe not.

    ---
    [PicBlaze/KCPSM]
    > For your neural network experiments, I believe that type of
    > implementation should suffice. Implementing a perceptron should
    > not take too many instructions.

    Certainly, but I'm not interested (any more / at the moment) on neural
    networks. They are fine in the area where they work, but as a general
    purpose computational model they need a lots of refinements for getting
    them work.

    The KCPSM model seemed interesting and I'll study it more.

    > Also, since you are planning to use an FPGA as platform,

    In fact, I'm not, but I think that FPGA would be one of the most easy
    way to test the hardware solutions...

    > check out Göran Bilskis insights on efficient processor design on
    > a prelaid architecture (the FPGA). These were posted about a
    > week ago on the list (The "Why open processors are som much
    > slower...").

    OK, thanks. I already readed those, when they arrived to this list, but I'll
    check them again. I'm also following the discussion of the 8-bit
    microprocessors (Z80 and 8088 compatibles).

    [BOPS]
    > There have been many attempts at creating multi-core-designs.
    [...]
    > Unfortunately BOPS have died. There are some stuff on the
    > webb still, this article for example:
    >
    > http://www.elecdesign.com/Articles/Index.cfm?ArticleID=3496&pg=2

    All right, thanks.

    ---

    And then to the interesting part ;-)

    > > The scalability is one of the key targets; no matter how many
    > > processors or GIPS you have in your desktop computer, it's not
    > > enough tomorrow ;-D
    >
    > Yes and no, see footnote [1].
    [...]
    > [1] Unless the HW is unable to run the Windows OS, which is the
    > perrenial compute hog. ;-)

    Certainly they port Windows for forthcoming processors, too - they
    already ported it for embedded devices ;-)

    > More seriously, thera are some very interesting grand challenges.
    > Look at Vernor Vinges singularity ideas for the wild ones. But global
    > weather prediction, gene/bio-design (not just analysis, but
    > engineering of DNA-based stuff) as well as more down-to-earthy
    > things like real-time speech recognition and synthesis.

    Yes, those are some application areas for parallel computing, but I think
    that we doesn't need to go that far. Each of our desktop computers
    have all the time several applications running and most of them are
    nowadays "threaded" - this has opened the door for SMP-computers,
    which were mostly unusable (i.e. the software couldn't use the
    performance) a decade ago.

    Even a "single-CPU" modern desktop computers have a parallel co-
    processor, the GPU, located in the graphics card - and they are
    becoming more and more programmable (see http://www.gpgpu.org). And still, there's need for increasing the processing power to make better games, to support realtime raytracing and to support live video effects. Even the highest performance Pentium feels slow, if you for example make a noice reduction for your half hour video recording. > Fortunately, with nano-technology if some wild ideas are to go by, > we should be able to get basically as much computing power as > we are going to need EVER: > http://www.aeiveos.com/~bradbury/MatrioshkaBrains/index.html Yes, here's the goal! ;-) But seriously, one can imagine computer systems like that, but how are they programmed? In which language? How are the processing cells constructed (instruction set, memories, external connections, etc)? What kind of memory bus those computers have? What kind of peripherals?

    Follow upAuthor
    [oc] Parallel Array Processor ProjectNico

     
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