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From: Austin Franklin<austin@d...>
Date: Tue Jul 20 15:33:46 CEST 2004
Subject: [oc] Why open processors are so much slower than commercial ones?
Hi Justin,

> But as you very correctly mentioned, its up to the writer of the code to
> understand the architecture and the compiler to get the most out
> of it. For
> a very complex system like hardware compilers it's hard for developers
> describing hardware in the language to really know how the interpretation
> stage and hardware compiler stages actually work.

Ah, not really...just do some short examples, and examine the output. I
always try case statements (of variable number of cases) and compare that to
if/else etc. I have had this argument for YEARS about HDL compiler
manufacturers providing BNF or what ever, so they would document the input
constructs, and the output from the compiler for a given construct, thus
allowing for designers to choose the better construct for their needs. I
finally just wrote up a little set of test cases, and I just run those with
each new HDL compiler/revision I get. Helps me find their bugs ;-)

> I wonder if Xilinx (or Altera) go to the extend of analyzing the compilers
> of their competitors, and find out what how to make the MicroBlaze code
> compile to run slower/less efficient on the other brand FPGA's as to keep
> their competitive advantage???

I believe the processor, and other IP, is shipped as an already compiled
module, so the compiler won't do any changing of the logic.

Regards,

Austin