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    From: markus at reaaliaika.net<markus@r...>
    Date: Thu Jul 15 09:19:47 CEST 2004
    Subject: [oc] Parallel Array Processor Project
    Top
    > The Raw project is here:
    > http://www.cag.lcs.mit.edu/raw/

    OK, I read the available information of RAW, Transit, iRAM and those.

    RAW is "regular" transputer -like architecture. The similarities between
    these architectures and mine is the connection network (just ot
    neighbors) and for the same reasons - this kind of network is highly
    scalable compared to any central-controlled networks.

    The difference between my project and these "transputer" -like
    architectures are the cell design. Both transputer and MIT RAW use
    quite regular CPUs as processing nodes. I'm trying to construct an
    independent cell, which have:

    - 1 instruction word memory (maybe 12 bits?)
    - 1 x 8-bit write-only memory element
    - N x 8-bit read-only memory (N = number of neighbors, possible values
    might be 4, 6 or 8)

    You might think, that my "macrocell" units bring the project closer to
    transputers, but it's not entirely true. "Macrocells" are there just to
    reduce transistor count by "simulating" the operation of multiple cells -
    thus many logic circuits can be shared, altought the speed drops
    because of sequential execution.

    Because cells are basically (but not purely) DFMs (Data Flow Machines),
    the "macrocells" are DFMs, too. I have already found DFM designs, but
    they mostly concentrate for implementing a - could we say - large scale
    DFM, with a pool of processors and common memory. Altought for these
    differences between my "macrocells" and those DFMs, I was able to
    refine my design using the information available on those.

    For programmers point of view, there's no semantical difference, if the
    processor hardware is constructed from single cells or macro-cells or
    with a hybrid model (using both macrocells and single cells in various
    combinations). It's possible to use even a heterogenous model, i.e. not
    all cells are able to perform all instructions - or the instruction
    completition time may vary. For example, single-cycle multiplication,
    which takes a lots of space, could only be performed in one cell, while
    others implement it with chained adding-and-shifting (taking several
    cycles).

    I also searched information about cellular automatas. I found something,
    but most of these systems are not aimed to produce a computational
    platform or to be used in physical world (only in computer simulations).
    I'll keep my eyes open for these.

    Follow upAuthor
    [oc] Parallel Array Processor ProjectJoachim Strömbergson

     
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