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Message
From: John Kent<jekent@o...>
Date: Wed Jul 14 15:17:39 CEST 2004
Subject: [oc] Parallel Array Processor Project
Hi MarkusI was looking at implementing a 8 CPU processor array in a 300K gate
Spartan 2e.
I've implemented a very simple 16 bit microprocessor and I figure I can
fit 8 of them
in the XC2S300e.
http://members.optushome.com.au/jekent/Micro16Array/index.html
The idea was to use the onchip block RAM with the memory segmented in 8
x 1Kbyte blocks.
The RAM is driven through a non blocking address and data bus switch in
such a way that
each processor can write into other CPU's memory but still have its own
shared local base
page memory.
Bus arbitration is prioritized so that the highest memory has the
highest priority access by the
local CPU. This means that any CPU writing a message to a given CPU's
base page memory
will have priority. CPU access arbitration is also prioritised based on
the position of the
messaging CPU's base page memory in the othe CPU's memory map.
The blocks are mapped differently in each CPU such that they all have
their own base page memory.
The CPU's have one interrupt which is used for message passing and is
triggered when one processor
writes into another processors base page memory.
I was going to use my VHDL 6809 clone core to control the processor
array from a separate
board but had a few problems working out the clock sharing between the
boards.
(I wanted to make them synchronous)
I've got so far with it having designed the CPU core, RAM switch and
most of the priority bus access
logic.... but sort of lost interest as I could see no real use for it,
and was getting a bit sick of CPU design.
I'm not sure what scale you are interested in designing on, what size
chips and how many.
My budget only supports simple 300K gate devices and free web pack software.
You might also consider what you can do with 2D and 3D cellular automata
designs.
John.
markus@r... wrote:
>Recently, I started again thinking about massive-parallel processor,
>which I last time designed in early 90's. You can get more information
>from my web pages:
>
>http://reaaliaika.net/showarea.php/procmem
>
>Short description: It's a general purpose, programmable, fine-grained
>massive-parallel processors, it's basically, but not purely a DFM.
>
>Why to announce here? If you get interested about the idea, you could
>help me in many ways. First of all, I'm more a programmer than a CPU
>designer, so if you have any idea for my "Simple-Cell" or "Macro-Cell"
>design, I'd be pleased. Second, you could point my browser to projects
>somewhat similar to mine. And third, I'm of course very interested to
>get some feedback of my project.
>
>
--
http://members.optushome.com.au/jekent
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