LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: John Sheahan <jrsheahan@o...>
    Date: 27 Nov 2003 08:23:22 +1100
    Subject: Re: [oc] OT : FPGA price
    Top

    On Thu, 2003-11-27 at 02:10, Martin.J Thompson wrote:
    > >On Tue, Nov 25, 2003 at 10:54:27AM +0000, Martin.J Thompson wrote:
    > >> >-no 2A power up spike,
    > >> 
    > >> None of that in V-II or Spartan-III
    > >
    > >the virtex's are specified to draw a big power-on surge actually.
    > 
    > Correct Virtex, Virtex-E, Spartan-II and SpartanIIe, and probably Spartan-XL..  Not Virtex-II
    > Also, All the Altera FPGAs as far as I know exhibit this behavoiur, but its less well documented.
    > 
    
    I was not aware (as I didn't look) the virtex II had eliminated surge.
    
    The VII-pro has it back again, specified only for a particular power
    sequencing, although with the statement that alternate power sequencing
    is not destructive. The smallest one (v2p4) was in the half amp range
    from memory.. Just vague enough I had to add supply sequencing to ensure
    supplies came up ordered.There was not a big margin there.
    
    > >Thats if you bring up the supplies in the correct order. 
    > >No idea what happens in the 'wrong' order.
    > >
    
    > 
    > Tjmax is what matters to whether your design works or not.  If you have a single FF toggling at 1Hz you can probably run in an ambient close to Tjmax.  In a big design all clocking fast, your maximum allowable ambient temperature is lower for the same Tjmax.  That's why there no point any vendor quoting me a Tambient max.  They know nothing of my design.
    > 
    
    This is true.
    device reliability (FIT) becomes a concern too.
    My response was only to emphasize although its  tjmax that matters, for
    timing reasons, that the ambient enters into the calculation. 
    Specifying max ambient would only make sense if the device power
    consumption is a constant. Hey - just like those early-eighties PLDs.   
    
    > Cheers,
    > Martin
    -- 
    John Sheahan <jrsheahan@o...>
    
    
    
    

    ReferenceAuthor
    Re: [oc] OT : FPGA priceMartin J Thompson

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.