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    Navigation: All forums > Cores > Message List > Message Post

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    From: Rudolf Usselmann <rudi@a...>
    Date: Tue, 18 Nov 2003 19:48:26 +0700
    Subject: RE: [oc] verilog or vhdl
    Top

    On Tue, 2003-11-18 at 17:41, Redant Steven wrote:
    > Ooops... are we going to hold a VHDL-Verilog war here? :)
    
    Hold, on I'm loading right now !
    
    > Choosing VHDL over Verilog because Verilog would be more of a standard is not a good reason.
    
    Actually it is.
    
    If you are in the business of making chips and are byuing
    IPs you will find that there are more IPs in Verilog than
    in VHDL. If you are a IP provider, you will find that there
    are more customers that ask for Verilog IPs than VHDL IPs. 
    
    If you are an Engineer and and are trying to build your
    value and expertise, it sure can't hurt to learn both.
    
    Regards,
    rudi               
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    ReferenceAuthor
    RE: [oc] verilog or vhdlRedant Steven

    Follow upAuthor
    RE: [oc] verilog or vhdlNico

     
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