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Message
From: Erez Birenzwig <erez_birenzwig@y...>
Date: Mon, 17 Nov 2003 11:57:46 -0800 (PST)
Subject: Re: [oc] DPLL using FPGA
Hi,
Well, there are two solutions to this problem:
1. Code the HDL, simulate and watch the results.
2. Understand what you are trying to achieve by writing code
and THINK for a possible HDL solution.
I would also advise you to read a bit about descrete event simulations
and their properties. This should help you understand how most HDLs are being
simulated.
And a final note, VHDL books are like "The C Programming Language" by K&R,
it's a basic book, and if you want to learn more then some more reading is
required. I don't know what field you're project is in, but there is probably
at least one book explaining how to solve your problem using HDL.
Regards,
Erez.
--- Vic <vikrantps@y...> wrote:
> Hi Mikhail,
>
> Yes, as you say i will make a search on Amazon. But
> the problem with my current books is that they have
> few basic examples on say just how to implement a
> process...but if I am to use 2-3 processes then I
> would like to know the behavioural functionality if I
> code in such a way.
>
> But thanks for the advice.
>
> Vic.
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