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Message
From: Erez Birenzwig <erez_birenzwig@y...>
Date: Thu, 13 Nov 2003 13:02:35 -0800 (PST)
Subject: Re: [oc] An FPGA Implementation Question
Thanks for the long reply. I think we have a misunderstanding here.
All I need is to keep the current real time from a certain point.
i.e. 0 = "Jan 1st 1990" or something like that.
So delta counting from the last event aren't very helpfull. It doesn't
meet the requirments for independent time stamping. If you're interested
the application is logging events and the software must be able to
handle them independently.
Anyway I think this subject is prety much covered now (and solved on my side).
Again, thanks to all who contributed to the subject. I've learned a lot from
all the replies.
Erez.
--- Jim Dempsey <tapedisk@a...> wrote:
> If the worst case is every clock cycle and/or if you have long streams of
> every clock cycle ticks and absenses of ticks then you have a problem in
> that the method implied by the 64-bit counter would indicate an extremely
> large logging buffer. I would suggest you change the design from using an
> explicit 64-bit time-stamp to a derrivable 64-bit time-stamp. One method to
> do this is to log the delta-time and state changes.
>
> xnnn nnn nnn nnn 16-bit code, x=signal value, nnn nnn nnn nnn =
> number of ticks x was held.
>
> The memory capacity of the log then only needs to be large enough to contain
> the state changes. The worst case scenario then becomes a state change at
> every other tick.
> log.
< CUT>
>
> There are many such techniques that can be used.
>
> Please keep in mind that this is a public forum searchable by google. If
> this work if for a thesis then it would behoove you to make reference to
> these discussions instead of claiming this as your original work.
>
> Jim Dempsey
>
>
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