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Message
From: Rudolf Usselmann <rudi@a...>
Date: Wed, 22 Oct 2003 18:49:59 +0700
Subject: Re: [oc] "makedep" for verilog
On Mon, 2003-10-20 at 14:44, Joachim Strömbergson wrote:
> Aloha!
>
> Rudolf Usselmann wrote:
> > Is there the equivalent of "makedep" for verilog ?
> >
> > "makedep" or sometimes "mkdep" creates a dependency
> > resolution list for makefiles. Would be useful to
> > have something similar for Verilog ...
>
> Vera has a makedep-lookalike that generates Makefiles for it's verification
> runs. This might not help you though.
>
> Google help me find a small Perl script that does basically what makedepend
> does. You should be able to adapt that script to Verilog or at least use it as
> a starting poing for a Verilog aware makedepend:
>
> http://freshmeat.net/search/?q=makedepend§ion=projects&x=0&y=0
>
> Good thinking btw.
Thanks Joachim, I'll take a look ...
Regards,
rudi
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