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Message
From: antti@c...
Date: Sun, 21 Sep 2003 10:49:45 +0200
Subject: Re: [oc] 'malloc' on FPGA
I know all the target hardware that supports RTR
also software that is capable of that.
the software support for RTR is real real bad at the moment.
so a software tools that has better build in support for RTR
would be interesting at least if it really works.
antti
----- Original Message -----
From: Shehryar Shaheen <shehryar.shaheen@u... >
To: cores@o...
Date: Sat, 20 Sep 2003 19:52:10 +0100
Subject: Re: [oc] 'malloc' on FPGA
>
>
> Run-Time Reconfigurations are possible
> with Xilinx FPGAs and J-Bits
>
> One such use of this is in
> Self Evolving Digital Circuits
>
> ----- Original Message -----
> From: <antti@c... >
> To: <cores@o... >
> Sent: Saturday, September 20, 2003 6:23 PM
> Subject: [oc] 'malloc' on FPGA
>
>
> > from japanese SFL pages
> >
> > 'malloc' on FPGA (not FPGA-CPU)!
> >
> > Future: dynamic hardware programming: In order to close the
> hardware-
> > software gap we are working on a new architecture called PCA
> (Plastic
> > Cell Architecture). It will be a platform that supports
> dynamic module
> > instantiation. SFL will be enhanced with constructs like
> 'malloc' or
> 'free'
> > in C language. Hardware will become soft- a big challenge and
> an
> > opportunity to get rid of the bottleneck of the Neumann-type
> computer
> > paradigm.
> >
>
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