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Message
From: Uwe Bonnes <bon@e...>
Date: Sat, 20 Sep 2003 21:40:08 +0200
Subject: Re: [oc] FREE Verilog Simulator
>>>>> "John" == John Sheahan <jrsheahan@o...> writes:
John> I ran a sonet testbench I had older 1000MHz athlon thunderbird,
John> linux 2.6.0test5
John> icarus 11:02 (min:sec) (20030810) cver 13:53
John> cver objected to a modules in the tb that were not there/not used
John> but the error message was reasonable. cver also objected to some
John> code that icarus was happy with (and ncverilog I think)when I ran
John> it a while back) - I need to look at the standard and see what
John> gives here.
John> ncsim wins hands down, then xl, then icarus, then cver for speed
John> on this one.
cver wins also when it comes to post-route simulation. Icarus wins when it
comes to Verilog 2001.
But I am glad we have both!
--
Uwe Bonnes bon@e...
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
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