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Message
From: John Sheahan <jrsheahan@o...>
Date: 20 Sep 2003 19:17:10 +1000
Subject: Re: [oc] FREE Verilog Simulator
I ran a sonet testbench I had
older 1000MHz athlon thunderbird, linux 2.6.0test5
icarus 11:02 (min:sec) (20030810)
cver 13:53
cver objected to a modules in the tb that were not there/not used
but the error message was reasonable.
cver also objected to some code that icarus was happy with (and
ncverilog I think)when I ran it a while back) - I need to look at the
standard and see what gives here.
ncsim wins hands down, then xl, then icarus, then cver for speed on this
one.
john
On Fri, 2003-09-19 at 23:42, Joachim Strömbergson wrote:
> Aloha!
>
> Rudolf Usselmann wrote:
> > I just stumbled across this baby:
> >
> > http://www.pragmatic-c.com/gpl-cver/
>
> Pretty kewl. I compiled and built it without any problems. Kudos to the
> Pragmatic-C team to produce a nice tarball with lots of READMEs explaining all
> directories etc.
>
> I've done som initial testruns on it works. What I'm curious/concerned about
> is simulation speed, especially on non-trivial designs. Icarus Verilog is in
> my opinion quite good in this respect. If time permits I'll try and do a
> shootout between these two Open Source Verilog simulators.
--
John Sheahan <jrsheahan@o...>
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