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Message
From: John Kent <jekent@o...>
Date: Sat, 20 Sep 2003 18:55:21 +1000
Subject: Re: [oc] Small CPU architectures
Hi Kirill,
I think a lot of it comes down to tribalism. Whether you're in the
Motorola or Intel / Zilog camp.
It was interesting for me to be able to design the chips I grew up with,
and in many ways
it demystified the "aura" that surrounded the chips. You come to realise
they are just
glorified state machines and pretty boring. But you have to venture down
the road to
realise that. My System09 does not serve any real purpose other than a
nostalgia trip :-)
There is also the issue of tools. ie whether you have to rewrite a
compiler, assembler
or simulator for each processor chip you design. ie how far up the
abstraction ladder
you want to go. I have not looked at the CPUGEN project, whether that
includes tools
to write the compiler for the processor you design.
The whole point of microprocessor chips is that you are multiplexing
logic in the time
domain, for events that are not so time critical as to need
implementation directly in
hardware. Which I guess is the point you are making. By making the
architecture more
general, you appeal to a wider audience. This is a good idea for fixed
silicon, but tends
to defeat the purpose of programmable logic as you rightly point out.
I've been helping someone off the FPGA CPU list with a compact flash reader.
The original code was written as a state machine, but it was not hard to
take it to
the next level and implement a simple micro which performed the same
function
in less logic. I'd perhaps argue with the issue that specific functions
mean less logic.
So far as integrating specific functions into a stored program machine,
its pretty
much a matter of rolling out an algorithm written for a micro into
dedicated logic
to speed things up, which is what people are doing when they try to
convert C
or Occam into parallel logic. ie. the reverse of what I was doing with
the Compact
Flash Reader.
John.
Kirill 'Big K' Katsnelson wrote:
> Guys,
>
> I am wondering why, when FPGA allows one to have infinite varieties of
> central (micro)processors, people keep implementing PIC, 8051 and
> 68K. First, I think that by implementing a task-specific instruction
> set, one can end up with faster and smaller CPU.
>
--
http://members.optushome.com.au/jekent
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