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    Navigation: All forums > Cores > Message List > Message Post

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    From: Rudolf Usselmann <rudi@a...>
    Date: 18 Sep 2003 14:25:09 +0700
    Subject: [oc] FREE Verilog Simulator
    Top

    
    I just stumbled across this baby:
    
    http://www.pragmatic-c.com/gpl-cver/
    
    >From their web site:
    
    "
    GPL Cver is a Verilog HDL simulator that is released under the GNU
    General Public License. GPL Cver is a full 1995 P1364 Verilog standard
    HDL simulator. It also implements some of the 2001 P1364 standard
    features including all three PLI interfaces (tf_, acc_ and vpi_) as
    defined in the 2001 Language Reference Manual (LRM). 
    
    GPL Cver is the last Cver release made to our former licensee Antrim
    Design Systems before Antrim Design assets were purchased by Cadence
    Design systems. Cver has been used in commercial design flows and
    therefore mimics Cadence Verilog-XL™. 
    "
    
    Cheers !
    rudi               
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    Follow upAuthor
    Re: [oc] FREE Verilog Simulator=?UTF-8?B?Sm9hY2hpbSBTdHLDtm1iZXJnc29u?=
    [oc] Flash modelNico

     
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