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Message
From: "Jim Dempsey" <tapedisk@a...>
Date: Tue, 26 Aug 2003 17:19:10 -0500
Subject: Re: [oc] 12bit data in 16bit packets?
How about a 28 bit shift register (12+16) with one zone of 12 bits on input
and one zone of output of 16 bits with 4 bit shift per clock. Input every 3
ticks, Output Every 4 ticks start outputing after first 4 ticks.
----- Original Message -----
From: "Jerrold Wen" <jwen@v...>
To: <cores@o...>
Sent: Tuesday, August 26, 2003 10:06 AM
Subject: RE: [oc] 12bit data in 16bit packets?
> Hi Jim,
>
> You are correct. I am packaging data for transport over hi-speed USB.
> However, I am using an off-the-shelf serializer so I have no control over
> that section - though your idea would be great if I did. I am writing to
a
> 16bit wide FIFO memory. The data bus in my design is 12 bits, and I just
> fill the 4 high bits with zeroes.
>
> Jerrold.
>
> -----Original Message-----
> From: owner-cores@o... [mailto:owner-cores@o...] On
Behalf
> Of Jim Dempsey
> Sent: August 25, 2003 2:24 PM
> To: cores@o...
> Subject: Re: [oc] 12bit data in 16bit packets?
>
>
> I will assume because you are using "bandwidth" and "sending zeros" that
you
> must be referring to a serial transmission system and not memory storage.
> Most serial transmission systems consist of a Latch/Shift Register setup.
> i.e. Parallel In - Serial Out. If you are sending data synchronously then
> you can modify the shift counter (e.g. 4 bit up counter) to pre-load with
4
> in addition to 0. In this manner the parallel in clocks every 12 shifts. A
> standard 16-bit shift register can be used for both 12-bit and 16-bit
> transmissions.
>
> It might help if you can elaborate on transmission requirements and
> restrictions.
>
> Jim
> ----- Original Message -----
> From: "Jerrold Wen" <jwen@v...>
> To: <cores@o...>
> Sent: Monday, August 25, 2003 9:57 AM
> Subject: [oc] 12bit data in 16bit packets?
>
>
> Hi all,
>
> Does anyone have any good ideas on how to pack 12bit data in to 16bit
> packets so that the extra bandwith is not wasted sending zeroes? I was
> thinking of using something like a four word FIFO and a barrel shifter.
For
> every four 12-bit words that are input, three 16bit words are output. One
> clock is used up at the beginning to 'arm' the FIFO.
>
> Are there any other techniques for this?
>
> Thanks,
> Jerrold.
>
>
>
>
>
>
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