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    Navigation: All forums > Cores > Message List > Message Post

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    From: "Igor Mohor\(opencores\)" <igorm@o...>
    Date: Thu, 19 Jun 2003 15:28:05 +0200
    Subject: RE: [oc] verilog CAN core implementation issues
    Top

    
    
    > -----Original Message-----
    > From: owner-cores@o... [mailto:owner-cores@o...] On
    > Behalf Of Uwe Bonnes
    > Sent: Friday, June 13, 2003 5:55 PM
    > To: cores@o...
    > Subject: Re: [oc] verilog CAN core implementation issues
    > 
    > >>>>> "anthonymarino" == anthonymarino  <anthonymarino@i...>
    writes:
    > 
    > ...
    >     anthonymarino> WARNING:NgdBuild:526 - On the RAMB4_S8_S8 symbol
    >     anthonymarino> "i_can_bsp/i_can_fifo/fifo", the following
    properties
    > are
    >     anthonymarino> undefined: INIT_00, INIT_01, INIT_02, INIT_03,
    INIT_04,
    >     anthonymarino> INIT_05, INIT_06, INIT_07, INIT_08, INIT_09,
    INIT_0A,
    >     anthonymarino> INIT_0B, INIT_0C, INIT_0D, INIT_0E, INIT_0F. A
    default
    >     anthonymarino> value of all zeroes will be used.
    > 
    > Harmless: A warning that you didn't specified default values for the
    > blockram
    
    Function that initializes all RAMs was added to the latest version of
    the CAN. All RAMs are initialized to zero.
    
    
    > 
    >     anthonymarino>  ERROR:NgdBuild:604 -
    >     anthonymarino> logical block 'i_can_registers' with type
    >     anthonymarino> 'can_registers'is unexpanded. Symbol
    'can_registers' is
    >     anthonymarino> not supported in target 'spartan2'.
    > 
    > This looks fishy. Try to understand what the author wanted to do.
    Probably
    > the syntax is problematic.
    
    Say what? Everything fully works in hardware. What problematic syntax?
    Come directly to me and we'll work it out. I assume you forgot to
    compile
    Something?
    
    
    > 
    >     anthonymarino> WARNING:NgdBuild:454
    >     anthonymarino> - logical net 'set_bus_error_irq' has no load
    >     anthonymarino> WARNING:NgdBuild:452 - logical net 'tx_request' has
    no
    >     anthonymarino> driver WARNING:NgdBuild:452 - logical net
    > 'tx_data_4<0>'
    >     anthonymarino> has no driver
    > 
    > "no driver" means that you use a signal where there is no gate that
    > provides
    > the output. Probably some typing error.
    > 
    > "no load" means that some signal is generated, but never consumed.
    > 
    > Try to understand all those issues.
    
    You got all this warnings/errors because of the "can_registers
    unexpanded" warning.
    Again, come back to me with more details and we'll work it out.
    
    
    Regards,
    	Igor
    
    
    > 
    > Bye
    > --
    > Uwe Bonnes                bon@e...
    > 
    > Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
    > --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
    > 
    
    
    
    

    ReferenceAuthor
    Re: [oc] verilog CAN core implementation issuesUwe Bonnes

     
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