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Message
From: Rudolf Usselmann <rudi@a...>
Date: 28 Apr 2003 22:56:15 +0700
Subject: Re: [oc] Async reset: active high or active low?
On Tue, 2003-04-29 at 00:24, cyrano@n... wrote:
> I really ask why active low reset is used in our labs.
> It was answer that it is an historical raison because
> in TTL high level signal consumme less energy than low
> one. Power up is not concerne any more because logic
> begin to work at ~2.5 V.
Ahh, the good old days of TTL ! Well, these days almost
everything is CMOS. I can't think of any applications that
still use TTL. Even the entire 74 series of TTL logic-gate
chips has been converted to CMOS.
I think I still have a box of some original 74xx chips at
my parents house in the attic. I'll dig it out next time
I visit them !
Cheers !
rudi
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