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From: <cyrano@n...>
Date: Mon, 28 Apr 2003 17:24:40 CEST
Subject: Re: [oc] Async reset: active high or active low?

I really ask why active low reset is used in our labs. It was answer that it is an historical raison because in TTL high level signal consumme less energy than low one. Power up is not concerne any more because logic begin to work at ~2.5 V.


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Follow up	Author
Re: [oc] Async reset: active high or active low?	John Sheahan
Re: [oc] Async reset: active high or active low?	Rudolf Usselmann