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    Navigation: All forums > Cores > Message List > Message Post

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    From: "Jim Dempsey" <tapedisk@a...>
    Date: Thu, 13 Feb 2003 10:36:02 -0600
    Subject: Re: [oc] Beyond Transmeta...
    Top

     
    ----- Original Message -----
    From: "Holger Baxmann" <holger@b...">holger@b...>
    Sent: Wednesday, February 12, 2003 4:23 PM
    Subject: Re: [oc] Beyond Transmeta...

    >
    > But, in difference to 'sims': it is not necessary to keep the single
    > identity for every bit while it is traveling the system, is it ?
    >
    > bax
    >
    The techniques for optimizing the performance of the system would
    require the bits (or bit streams) to exist in multiple places at once
    and in different time states. A simple illustration would be
     
        aaaa = bbbb + cccc
        bbbb = aaaa + cccc
     
    Becomes: (set to display in courier)
     
       bbbb+
       cccc+
      aaaa+/
      cccc+
     bbbb/
     
    Note that you cannot visualize bbbb as a whole entity at all points
    in time. In time state 3 the lsb of bbbb transitions to new state
    while the more significant bits of bbbb (of the first use) have
    yet to be used. There undoubtedly will be cases where the bit
    "consumption" rate of a bit stream longer than 1 clock tick. In this
    case if the input variable is recomputed elsewhere then the
    first use stream is conceptualized as producing a loop. This
    is too hard to diagram here in text glyphs.
     
    Conceptually, if a "function" block were to use a variable at a particular
    time state it would always clock in one bit per clock. Internally it can
    consume (use) the bits at a longer time interval (e.g. one bit every
    other clock). You can view this as a serial FIFO where input and
    output are at different clock frequencies.
     
    The implementation would not use a FIFO inside each function block.
    Instead. The bit stream variables, at any one time, can live at different
    time states in multiple locations of the device. Example:
    (set to display in courier)
     
      bbbbbbb
        b
        bbb
     
    In the above if the bit stream of bbbbbbb were forked and if the leading
    bit of the upper and lower streams were used at the same time in
    the device then the lower use is as the state of bbbbbbb was two time
    states earlier. If the loop is longer than the width of bbbbbbb then it
    becomes possible to use an earlier state of bbbbbbb even after a
    later state of bbbbbbb was completely modified. The delay loops
    and/or ersatz FIFOs are an integral part of the dynamic wiring of the
    device.
     
    This is quite a departure from programming languages such as C++,
    FORTRAN, etc. Initial uses of the device would make use of cross
    compilers where you start your programming experience using something
    familiar. Later on a new language would evolve beginning with some
    obtuse precompiler statements/directives.
     
    I envision that the ideal programming tool would be a visual tool that
    resemble something like needlepoint that is "performed" on a time domain
    scroll (player piano like). The width of the roll is respective of the size
    of the device BSPLD or whatever acronym suits you best. If you use a
    smaller device than optimally (performance wise) the length of the roll
    extends (i.e. the computation takes longer). You likely would perform
    the needlepointing on an abstraction pane and a separate pane would
    be drawn to illustrate the utilization of the target device.
     
    Jim Dempsey
     
     

    ReferenceAuthor
    Re: [oc] Beyond Transmeta...Holger Baxmann

     
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