<DIV>I will short resistors connected to MODE and SUSPEND (there is no Suspend  as I saw in the USB1.1 Core)</DIV> <DIV>about the 10K, actually I am exaggerating it , I may use something like 2.2K, its only for protection in case I had two outputs connected to gether, am new to FPGA :)</DIV> <DIV> </DIV> <DIV>after all do u think its gona work properly?</DIV> <DIV>AbuKhater<BR><BR><B><I>Rudolf Usselmann <rudi@asics.ws></I></B> wrote:</DIV> <BLOCKQUOTE class=replbq style="PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #1010ff 2px solid"><BR>- Mode should be hard wired<BR>- Suspend should go to the FPGA (if you are planning to<BR>use it, otherwise hardwire as ell).<BR>- Why do you use 10K resistors between the FPGA and the<BR>transceiver ?<BR><BR><BR><BR>On Tue, 2004-03-09 at 01:34, Mohammad AK wrote:<BR>> hi everybody<BR>> I would appreciate, any comments on the attached schematic. <BR>> thanks <BR>> AbuKhater<BR>> <BR>> <BR>> ______________________________________________________________________<BR>> Do you Yahoo!?<BR>> Yahoo! Search - Find what youre looking for faster.<BR>> <BR>> ______________________________________________________________________<BR>> _______________________________________________<BR>> http://www.opencores.org/mailman/listinfo/usb<BR>-- <BR>rudi <BR>========================================================<BR>ASICS.ws ::: Solutions for your ASIC/FPGA needs :::<BR>..............::: FPGAs * Full Custom ICs * IP Cores :::<BR>FREE IP Cores -> http://www.asics.ws/ <- FREE EDA Tools<BR><BR><BR>_______________________________________________<BR>http://www.opencores.org/mailman/listinfo/usb</BLOCKQUOTE><p><hr SIZE=1> Do you Yahoo!?<br> Yahoo! Search - <a href="http://search.yahoo.com/?fr=ad-mailsig-home">Find what you’re looking for faster.</a>