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Message
From: Doug Williams<dougwilliams@h...>
Date: Fri Aug 26 04:10:33 CEST 2005
Subject: [usb] USB Host (1.x) Core Size
Greetings All,
I was considering using the USB 1.1 Host/Slave core in a design to be
instantiated in the smallest Altera Cyclone I can find (EP1C3 or EP1C4).
However, comparing sizes, this core seems disproportionately large to me.
The user documents say the core is a bit over 2K LE's, and just under that
if I only use the host side. Being somewhat naive on USB cores and it's
full functionality, it seems big to me- the Altera NIOS core - a full 32 bit
processor - can be fit into just over 600 LE's in its samllest and just
under 2K at its fastest. This seems odd to me.
Second, assuming the core is how big it is for functionality - does anyone
have any experience paring this core down any? I just need the host side,
and I need bare USB functionaity. I'm thinking I can get rid of ISO and
bulk transfer support etc - and pass the very little sparse data I have on a
the main control endpoint. Basically, I'm passing a few status bytes to a
semi-custom USB end device every few seconds.
Has anyone played around to see how much can be gotten rid of? I can trade
off true USB compatibility, as I dont really need it, all I really need is
the absolute bare mimnimum functionality for the host side.
Thank you, I appreciate your help and the hard work everyone has done on
these cores...
Doug Williams
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