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I have created a new test for the USB 1.1 OpenCores testbench by

Hi Dalton,
I have successfully implemented USB 1.1 in FPGA and I discovered the
same thing. My endpoint 1 OUT FIFO was 8 bytes deep. I discovered that
if I allowed the fifo_full signal to go high, the USB core didn't like
it and the windows application crashed. So I had to change the design
to make sure I read each byte as it is written.

Rahul

On Mon, 22 Nov 2004 17:14:32 -0500, Dalton Marris <dmarris@c...> wrote:
> I have created a new test for the USB 1.1 OpenCores testbench by
> modifying the original "out0" task.  I commented out the "fork" and
> "join" lines (558 and 621) so that all of the data is written to the
> fifo before anything is read out of it.  With a fifo depth of 256, I
> would expect the test to pass until the total number of bytes written to
> the fifo is more than 256.  With that said, when no_pack = 3 (actually 4
> packets) and pl_size = 64, a total of 4 x 64 = 256 bytes will be written
> to the fifo.  This will fill the fifo, but just to it's maximum depth.
> When this scenario occurs, the testbench fails, and I get the following
> error message:
> 
> ERROR: ACK mismatch. Expected: d2, Got: 5a (2748140.0 ns)
> 
> I have verified that I am indeed getting a NACK back.  Shouldn't I be
> able to fill the fifo, as long as I don't try to overfill it, without
> generating a NACK?
> 
> Regards,
> Dalton
> 
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/usb
> 

-- 
Regards,

Rahul Kumar