LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Usb > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: M. AbuKhater<perocletos@y...>
    Date: Tue Mar 9 15:57:06 CET 2004
    Subject: [usb] USB1.1 transceiver
    Top
    I will short resistors connected to MODE and SUSPEND (there is no Suspend as I saw in the USB1.1 Core)
    about the 10K, actually I am exaggerating it , I may use something like 2.2K, its only for protection in case I had two outputs connected to gether, am new to FPGA :)

    after all do u think its gona work properly?
    AbuKhater

    Rudolf Usselmann <rudi@a...> wrote:

    - Mode should be hard wired
    - Suspend should go to the FPGA (if you are planning to
    use it, otherwise hardwire as ell).
    - Why do you use 10K resistors between the FPGA and the
    transceiver ?



    On Tue, 2004-03-09 at 01:34, Mohammad AK wrote:
    > hi everybody
    > I would appreciate, any comments on the attached schematic.
    > thanks
    > AbuKhater
    >
    >
    > ______________________________________________________________________
    > Do you Yahoo!?
    > Yahoo! Search - Find what youre looking for faster.
    >
    > ______________________________________________________________________
    > _______________________________________________
    > attachment.htm

    ReferenceAuthor
    [usb] USB1.1 transceiverRudolf Usselmann

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.