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Message
From: Rick Collins<opencores.usb@a...>
Date: Fri Mar 5 16:39:30 CET 2004
Subject: [usb] Suspend mode and FPGA:s
At 10:10 AM 3/5/2004, you wrote:
>hello all,
>
>quote:
> > I think the core has to be up and running if it should be able to detect
> > resume signaling from the hub? This does not make it easier though!
>unquote.
>i kinda have the same problem:
>since in my case the core will be running on a clock provided by the
>phy, putting the device in suspend will disable the clock, and thus the
>core wont be able to detect any resume signaling as well....right?
>
>will it be sufficient to just reset the core and usb bus when the clock is
>up & running after the bus (i will be using a clock manager in the fpga ->
>no problem generating a reset)?
>
>OR even better, will it be possible for me to tie suspend to the phy to 0
>all the time? i want my device to work, it doesn't have to be up to the
>usb20 spec.
>
>if somebody can figure out what my options are, i would really
>appreciate some help on this point.
If you want to put the FPGA in a very low power mode, you will have to pick
your FPGA for that. I have been doing a lot of searching for semi-low
power, but mainly 5 volt tolerant FPGAs. Turns out there is a lot of
overlap between the two. As they shrink the process geometries, the 5 volt
tolerance goes away and the quiescent current goes up.
I found an ACEX (EP1Kxx) family from Altera that has 5 volt tolerance with
a quiescent current in the 5 - 10 mA range. This is not within your spec,
but it may do the job. Altera also makes the Cyclone family (EP1Cxx) which
is not 5 volt tolerant and has a quiescent current in the 4 - 12 mA range
(typ) depending on part.
Xilinx lost 5 volt tolerance with the introduction of the Virtex IIE
family. The quiescent current of the Virtex IIE is in the 100's of
mA. The Virtex II family has 5 volt tolerance and has a quiescent current
around 10 - 100 mA depending on the part. The older Spartan XL family is
both 5 volt tolerant and has a very low quiescent current of about 100 uA.
Certainly it will be easier to work with the newer parts since they also
tend to be cheaper and larger. But the older parts fit your needs better
it seems.
What exactly is the wake up criteria in the USB spec? It would be an
unusual circuit that could do significant processing and still have very
low power like this (500 uA). But then I guess it is not impossible. Does
the circuit wake up on the first signal transition on the USB bus?
Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
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