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Message
From: antti@c...
Date: Sun, 26 Oct 2003 15:57:30 +0100
Subject: RE: [usb] USB 1.1 PHY, DPLL question
----- Original Message -----
From: "Marc Reinig" <mreinig@p... >
To: <usb@o... >
Date: Fri, 24 Oct 2003 13:06:09 -0700
Subject: RE: [usb] USB 1.1 PHY, DPLL question
>
>
> I don't know why you think that +/- 20% are possible.
just happened to read datasheet for ISP1181 there is stated
that SE0 (during normal transmittion!) as seen on the single
ended receivers can be as much as 14ns,
1 bit is 83 ns, that makes up to 17% error if looking
at single ended receivers!
(this is time during normal transition where single ended
receivers may see SE0 state on the bus - this SE0
is seen at every transition of the incoming signal)
thats what one manufacturer says, this number: 14 ns
may differer a little depenig on the manufacturing technology, etc.
nut my dumb estimate up to 20% is not so impossible at all.
antti
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