LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Usb > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: tomko@h...
    Date: Wed, 22 Oct 2003 06:16:46 +0200
    Subject: [usb] usb1.1 PHY core clock frequency
    Top

    I would like to ask some question about FS usb:
    
    1.why the usb1.1 PHY need to supply with a 48 MHZ(4x data streaming 
    rate), can i just input a 12MHZ clock?
    
    2.what should be the frequency of the clock for the remain usb core 
    (UTMI, Protocal Layer.......) , should it be 12MHZ if using full speed 
    mode?
    
    3.Where should the clock of the remain usb core be generate out ? from 
    PHY ? or from the external cycstal oscillator?
    
    Thank you very much.
    
    
    

    Follow upAuthor
    Re: [usb] usb1.1 PHY core clock frequencyRudolf Usselmann

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.