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Message
From: christian@m...
Date: Wed, 27 Aug 2003 16:45:37 +0200
Subject: Re: [usb] IP Core vs. USB chip...
The USB 1.1 function IP core has been tested on a Cyclone FPGA from
Altera?
Christian
----- Original Message -----
From: christian@m...
To: usb@o...
Date: Wed, 27 Aug 2003 16:11:32 +0200
Subject: Re: [usb] IP Core vs. USB chip...
>
>
> Thank you, it's now more clear. I have to connect the transceiver
> to a
> SIE. And the latter is the USB PHY that i have already downloaded
> from
> OpenCores Projects, right? And I downloaded too the USB 1.1
> function
> IP in order to describe the USB device (Device descriptor,
> configuration,
> endpoints, etc.)
>
> I hope that's very easy to use and install :)
>
> Regards
>
> Christian
>
>
> ----- Original Message -----
> From: Rudolf Usselmann <rudi@a... >
> To: usb@o...
> Date: 27 Aug 2003 20:33:06 +0700
> Subject: Re: [usb] IP Core vs. USB chip...
>
> >
> >
> > On Wed, 2003-08-27 at 19:42, christian@m... wrote:
> > > Hello,
> > >
> > > The PDIUSBP11 has an I2C interface. So, I have to
> install in
> > my FPGA a
> >
> > No it does not !!! Perhpast there are several parts
> > with similar names ...
> >
> > It has 3 inputs for the transmitter: OE, Data+, Data-
> (digital)
> > and Three Inputs from Receiver: Data, Data+, Data-
> >
> > On the USB side it has D+, D- which go to the USB bus.
> > I have attached the data sheet to avoid future confusion !
> >
> > > I2C interface IP, USB PHY and a USB 1.1 function core IP.
> Do
> > I have to
> > > write a firmware in order to receive the requests from
> the
> > host and
> > > prepares the data to send through the I2C interface.
> > >
> > >
> > > Best regards
> >
> >
> > Cheers,
> > rudi
> > --------------------------------------------------------
> > www.asics.ws --- Solutions for your ASIC/FPGA needs ---
> > ----------------- FPGAs * Full Custom ICs * IP Cores ---
> > FREE IP Cores --> http://www.asics.ws/ <-- FREE IP Cores
> >
> > <P>gz00000.gz</P>
> >
>
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