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Message
From: elite<liyicheng@y...>
Date: Wed, 19 Feb 2003 16:27:34 -0100
Subject: Re: [usb] A student need your help
Vikas,thanks for help.
u mean the clock and the (bus) data rate are the same(480Mb/s),but I
want to know how it is implement(for example ,in VHDL or verilog).
thanks!
----- Original Message -----
From: "Vikas T Rao " <vikasraot@m... >
To: <usb@o... >
Date: Wed, 19 Feb 2003 10:24:31 +0530
Subject: Re: [usb] A student need your help
>
>
> hi,
>
> 1. the clock u should be using for doing protocol operations(like
> CRC,
> bit stuffing, NRZI, serial to parallel & vice-versa) should be
> 480MHz.
> the clock for internal parallel operations(like keeping data into
> FIFO,
> processing of that data, etc) can be of you choice. if u have to do
> 16
> bit parallel operations, then u should have 30MHz clock (30MHz X 16
> =
> 480MHz). if 8 bit, then 60MHz has to be used. depending on the
> clock
> being used for parallel operation, u can select the same crystal
> frequency(i.e., either 30 or 60MHz).
>
> 2. buffer size = max.packet size + 2 CRC bytes. if incoming data is
> more than the max. packet size + 2, then ur logic should be capable
> to
> discard those extra bytes(as u can't spare other buffer locations
> with
> these extra bytes) and report error.
>
> hope ur doubts got cleared.
>
> ...Vikas Chandra Rao.
>
> >>> liyicheng@y... 02/19/03 11:36AM >>>
> Hi
> I'm a student ,I must implement a usb2.0 core in my degree
> paper.And
> I have some questions about it:
> 1. How determin the clock in usb bus (HS mode)
> 2.How calculate the buffer size in an isochronous endpoint(HS
> mode).
>
> Thanks
>
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