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    Navigation: All forums > Usb > Message List > Message Post

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    From: mdennis97@h...
    Date: Sat, 14 Dec 2002 05:02:19 -0100
    Subject: Re: [usb] dout of usb 1.1 function core
    Top

    Thanks,rudi.You are right.I made a mistake for these wires.
    
    I have another question:why some signals of the PL module were not 
    handled?
    ie.,token_valid,int_to_set,int_seqerr_set,pid_cs_err,nse_err,crc5_err,rx_s
    ize,rx_done,etc..
    
    Regards
    
    Dennis
    
    ----- Original Message ----- 
    From: Rudolf Usselmann <rudi@a... > 
    To: usb@o...  
    Date: 04 Dec 2002 22:20:03 +0700 
    Subject: Re: [usb] dout of usb 1.1 function core 
    
    > 
    > 
    > 
    > Dennis, 
    > 
    > please understand that I can not clarify each of the 50 emails I 
    > get every day. 
    > 
    > Honestly I don't understand what the point of confusion is, but 
    > let me assure you that this core has been implemented in a product 
    > that is shipping and works just fine ! 
    > 
    > Try to read through the code and run a few simulations, look at 
    > the waveforms at different levels, may be that will help to 
    > understand what is going on. 
    > 
    > Good Luck ! 
    > 
    > rudi 
    > ------------------------------------------------ 
    > www.asics.ws   - Solutions for your ASIC needs - 
    > NEW ! 3 New Free IP Cores this months (so far :*) 
    > FREE IP Cores  -->   http://www.asics.ws/  <--- 
    > -----  ALL SPAM forwarded to: UCE@F...   ----- 
    > 
    > On Wed, 2002-12-04 at 21:28, M Dennis wrote: 
    > > hi,rudi 
    > > 
    > > I am a little confused with your USB 1.1 Function IP Core.In 
    > usb1_core.v, 
    > > 
    > > // In endpoints only 
    > > always @(posedge clk_i) 
    > > 	case(ep_sel)	// synopsys full_case parallel_case 
    > > 	   4'h0:	tx_data_st <= #1 ep0_dout; 
    > > 	   4'h1:	tx_data_st <= #1 ep1_din;   // why not ep1_dout? 
    > > 	   4'h2:	tx_data_st <= #1 ep2_din; 
    > > 	   4'h3:	tx_data_st <= #1 ep3_din; 
    > > 	   4'h4:	tx_data_st <= #1 ep4_din; 
    > > 	   4'h5:	tx_data_st <= #1 ep5_din; 
    > > 	   4'h6:	tx_data_st <= #1 ep6_din; 
    > > 	   4'h7:	tx_data_st <= #1 ep7_din; 
    > > 	endcase 
    > > 
    > > epn_din is input wire,which should not connected to assigned 
    > to an output 
    > > port,isn't it?I think the data stream will flow from epn_dout 
    > to PL module 
    > > via tx_data_st. 
    > > 
    > > Similar dout to the following code in the same file. 
    > > 
    > > assign ep1_dout = rx_data_st; 
    > > assign ep2_dout = rx_data_st; 
    > > assign ep3_dout = rx_data_st; 
    > > assign ep4_dout = rx_data_st; 
    > > assign ep5_dout = rx_data_st; 
    > > assign ep6_dout = rx_data_st; 
    > > assign ep7_dout = rx_data_st; 
    > > 
    > > 
    > > Please clarify them. 
    > > 
    > > Reagards 
    > > 
    > > Dennis 
    > > 
    > > 
    > 
    _____________________________________________________________
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    > > 
    > > 
    > > 
    > 
    
    
    

    Follow upAuthor
    Re: [usb] dout of usb 1.1 function coreRudolf Usselmann

     
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