OPENCORES.ORG

From: "SeokYeon Jeong" <seokyeon@m...>
Date: Wed, 31 Jul 2002 12:04:55 +0900
Subject: [usb] about USB Function Core

I watch with deep concern USB 2.0 Function Core in the opencores.

I am under contemplation to simuate this core.

I am reading carefully the manual and the Verilog RTL code.

I think there are some mistakes in the manual and RTL.

I'll attach these mistakes(??) I found until now.

There may be more, and I'll post later.

Please correct my misunderstanding.

Regards,

SeokYeon

=====================================================================

In the Manual

=====================================================================

P.8 : In Figure 4, there are TxFifo and RxFifo, but, in RTL
code 'usbf_utmi_if.v', there is no fifo. where is fifo in the RTL code?

P.22 : Buffer Available? -> Yes -> Reply ACK ??? :

Why 'Reply ACK' ?

The sequence of IN request is "In-packet from host ->

Data-packet from device -> Handshake-packet from host", so I think

'Reply ACK' stage must be removed.

P.24 : 1. IDLE asserted for > 2.5uS but < 3.0mS & FS mode ???
I think the 'IDLE' is changed with 'SE0'.
2. I think the flowchart should be added with 'SUSPEND ----> RESET' path for SE0 > 2.5us

P.31 : Bit 5 is used for Resume Request From Core in the RTL code,
But, in the table 3, Bit 5 is reserved.

P.40 : I don't know where to connect the external pin 'susp_o' and 'resume_req_i' (Core or ???)

P.41 : the width of 'sram_adr_o' should be changed from 14 to 15.

=====================================================================

* Code

=====================================================================
usbf_defines.v : Line 218 : 7'd2 => 6'd2
Line 227 : 7'd50 => 7'd80

usbf_utimi_ls.v : Line 335 : 'usb_vbus' is always high when connected to host.
                                           then the 'state' is always 'POR' ?
                          Line 205 : SuspendM : low active
                                          so, must be inverted
                          Line 342 : 0-2.9375 => T0+2.9375
                          Line 343 : idle_cnt1 => idle_cnt2
                          Line 346 : idle_cnt1 => idle_cnt2
                          Line 348 : 3.1875us => 3.1875mS
                          Line 349 : idle_cnt1 => idle_cnt2
                          Line 351 : 3.125mS => 5mS
                          Line 351 : 3.1875us => 5.0625mS
                          Line 352 : idle_cnt1 => idle_cnt2
                          Line 419 : the reg 'T1_gt_100_uS' is not used.
                                          It must be used somewhre.
                          Line 552 : in this state, 'bit_stuff_off' must be set for
                                         remote wakeup. (there is no setting for
                                         'bit_stuff_off', always zero. So 'OpMode' is always '2'b00)
                                         after this, 'bit_stuff_on' must be set in
                                         ??? state ( I don't know the exact state)
                          Line 629 : Change mode to FS => Change mode to HS

usbf_rf.v : Line 317 : utmi_vend_wr => VControlLoadM : low active,
so, must be inverted

usbf_top.v : Line 235 : 'rf_resume_req' is not used.
I think this signal may be ORed with Line 245.

usbf_pl.v : Line 249 : why 'pid_ACK' is pid_bad1 ?
                    Line 338 : 'token_fadr' is used to make 'fsel' signal which is
                                     entered to 'usbf_pe.v' but not used.
                                     so 'token_fadr' is no need to out.
                    Line 347 : 'rx_seq_err' is not used externally, so 'seq_err' is
                                      no need to out.