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Message
From: Jeremy Bennett<jeremy.bennett@e...>
Date: Fri Jul 18 21:49:34 CEST 2008
Subject: [openrisc] What tag version of the RTL should I use that
matches the or1k-sim?
Hi Flavio,Your description of FLASH is correct - there is no address translation
on load. However I've never used logging, so I don't know if it works.
Can you single step the simulator, so you can see the successive
changes? That will show immediately if the PC is changing to 0xf0000118.
I'm not aware of any default initialization of either MMU. Linux boot up
has code which sets it up for Linux, so I guess that is what you will
need to do.
Just so you understand, I only started looking at the code for Or1ksim a
few weeks ago, so I could use it in one of my projects. The people who
wrote the original code have not been actively involved in OpenCores for
some time, and I have not discussed the architectural simulator with
them.
I've fixed some bugs and written up what I did, so others can learn from
it. I'm very happy to share what I've learned about Or1ksim, but there's
still a great deal about it which I do not know.
By all means send me the vmlinux (and the Or1ksim command line you used)
and I'll see what happens when I try to run.
HTH,
Jeremy
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Tel: +44 (1202) 416955
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-----Original Message-----
From: Flavio M. De Paula <depaulfm@c...>
To: jeremy.bennett@e..., List about OpenRISC project
<openrisc@o...>
Subject: Re: [openrisc] What tag version of the RTL should I use that
matches the or1k-sim?
Date: Fri, 18 Jul 2008 11:35:32 -0700 (PDT)
> My feeling is that the core CPU is reasonably accurate. I don't think
> something as big as Linux would work if there were serious errors in the
> instruction modeling. It is an architectural simulator, so don't expect
> perfect cycle counts.
OK! Let's talk from the CPU point-of-view, instead.
1) When passing an image to the or1ksim, does it load each specific
memory section (described in the sim.cfg) based on the address in the
image, or some address translation happens at this point? Let me
illustrate w/ a simple example:
- In sim.cfg, the memory section "FLASH" has addressbase= 0xF0000000;
- If the image has instructions that starts at this address base, will
or1ksim load those instructions into the "FLASH" memory section?
- If I enable log in the "FLASH" memory section by assigning "log =
flash.log", I should see accesses to location above 0xF0000000, shouldn't
I? Unfortunately, I am not. That is what is leading me to believe there is
some address translation happening before the address gets out of the cpu.
2) The IMM is enabled in the or1ksim by default. I assume some
configuration of the page table, and imm registers need to occur before
using it. I believe you do that by default (within your implementation),
in other words, you don't require the image being loaded to configure the
IMM. Is this true?
Thank you,
PS: I could give you the vmlinux so that you'd see what I'm saying. Just
let me know if you need it.
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