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Hi Anthony,

This doesn't look like a sim.cfg file to me. You should have something
like:

<lots of header stuff>

section memory
  bus = "wb:0.0"
  /*random_seed = 12345
  type = random*/
  pattern = 0x00
  type = unknown /* Fastest */

  name = "FLASH"
  ce = 0
  mc = 0
  baseaddr = 0xf0000000
  size = 0x01000000
  delayr = 10
  delayw = -1
end

section memory
  bus = "wb:0.0"
  /*random_seed = 12345
  type = random*/
  pattern = 0x00
  type = unknown /* Fastest */

  name = "RAM"
  ce = 1
  mc = 0
  baseaddr = 0x00000000
  size = 0x02000000
  delayr = 20
  delayw = 25
end

section memory
  bus = "wb:0.0"
  /*random_seed = 12345
  type = random*/
  pattern = 0x00
  type = unknown /* Fastest */

  name = "SRAM"
  mc = 0
  ce = 2
  baseaddr = 0xa4000000
  size = 0x00100000
  delayr = 1
  delayw = 2
end

<lots more stuff>

This is provided as sim.cfg in the MoF linux patches.

HTH,

Jeremy

-  
Tel:      +44 (1202) 416955
Cell:     +44 (7970) 676050
SkypeID: jeremybennett
Email:   jeremy.bennett@e...
Web:     www.embecosm.com

-----Original Message-----
From: anthonyyi@m...
Reply-To: List about OpenRISC project <openrisc@o...>
To: openrisc@o...
Subject: Re: [openrisc] OR1200 porting MP3 problem
Date: Fri, 11 Jul 2008 11:58:42 +0200 (CEST)

The default sim.cfg use a simmem.cfg to discribe the memory information
00000000 00200000 flash 0 5 5
40000000 00000010 RAM 2 1 1
80000000 00200000 RAM 1 1 2

I don't know this format
Anyone can give a xess.ld file which can link correcttly the mp3 project
or explain how can we modify a xess.ld file when I see a lot of
section need to limit the location

Thank you very much

Regards

Anthony

----- Original Message ----- 
From: Jeremy Bennett<jeremy.bennett@e...> 
To: 
Date: Thu Jul 10 08:59:16 CEST 2008 
Subject: [openrisc] OR1200 porting MP3 problem 

> Hi Anthony, 
> 
> This is an error message from the Or1ksim saying that it has no 
> memory 
> at location 80000000, so it can't load your code there. Have you 
> configured a memory block at that location in your sim.cfg file? 
> HTH, 
> Jeremy 
> - 
> Tel: +44 (1202) 416955 
> Cell: +44 (7970) 676050 
> SkypeID: jeremybennett 
> Email: jeremy.bennett at embecosm.com 
> Web: www.embecosm.com 
> -----Original Message----- 
> From: anthonyyi at msn.com 
> Reply-To: List about OpenRISC project <openrisc at 
> opencores.org> 
> To: openrisc at opencores.org 
> Subject: Re: [openrisc] OR1200 porting MP3 problem 
> Date: Thu, 10 Jul 2008 05:35:47 +0200 (CEST) 
> since I have downloaded the new tool chain from opencores web 
> and run the newest cross compiler in a linux machine 
> The previous problem have been sloved 
> However I add something on the xess.ld as follows 
>  .rodata : 
>  { 
>  *(.rodata) 
>  *(.rodata.str1.1) 
>  *(.rodata.cst4) 
>  __etext = . ; 
>  } > ram 
> If not add these, the ld will give out some error information 
> But I don't know whether is rigth to this. 
> The linker can work correctly and generate the excutable file 
> Now, the problem is coming when I use simulator: 
> It will reports that: 
> ERR: 8-bit program load out of memory area: 80000000 
> ... 
> ERR: 8-bit program load out of memory area: 80001d08 
> ERR: 8-bit program load out of memory area: 80001d09 
> ERR: 8-bit program load out of memory area: 80001d0a 
> ERR: 8-bit program load out of memory area: 80001d0b 
> ERR: 8-bit program load out of memory area: 80001d0c 
> ERR: 8-bit program load out of memory area: 80001d0d 
> when I use the decompiler to see the asm file 
> Disassembly of section .text: 
> 80000000 <__start>: 
> 80000000: 9c 61 00 00 l.addi r3,r1,0x0 
> 80000004: 00 00 2a f6 l.j 8000abdc <__uClibc_start> 
> 80000008: 15 00 00 00 l.nop 0x0 
> 8000000c <_report1>: 
> 8000000c: 9c 21 ff e8 l.addi r1,r1,0xffffffe8 
> 80000010: d4 01 10 00 l.sw 0x0(r1),r2 
> 80000014: 9c 41 00 18 l.addi r2,r1,0x18 
> 80000018: d7 e2 1f f8 l.sw 0xfffffff8(r2),r3 
> 8000001c: 9c 60 12 34 l.addi r3,r0,0x1234 
> 80000020: d7 e2 1f f4 l.sw 0xfffffff4(r2),r3 
> 80000024: 84 82 ff f4 l.lwz r4,0xfffffff4(r2) 
> 80000028: d7 e2 27 fc l.sw 0xfffffffc(r2),r4 
> I don't know why this is happen 
> So any can help 
> Thank you deeply 
> ----- Original Message ----- 
> From: anthonyyi<anthonyyi at m...> 
> To: 
> Date: Sun Jul 6 10:13:55 CEST 2008 
> Subject: [openrisc] OR1200 porting MP3 problem 
> > Actually I find the compiler command using for compile mp3 is 
> : 
> > or32-rtems-gcc/or32-rtems-as/or32-rtems-sr/ 
> > However, I haven't porting the rtems system to my envirment 
> yet( 
> > Cgywin in 
> > Windows XP) 
> > I try to use or32-uclinx-* commands to replace those commands 
> > Then it gives out errors as follows: 
> > /opt/or32-uclinux/lib/gcc-lib/or32-uclinux/ 
> > 3.1/../../../../or32-uclinx/bin/ld: 
> > canot find -lc 
> > collect2 ld returned 1 exit status 
> > make[1]: *** [minmad] errror1 
> > BTY, I modified the _ANSI file there is no sys/config.h/ in my 
> > directory 
> > I think the xess-mad project is porting by the rtems group. 
> > Who have complied this project successfully can give me some 
> > advice? 
> > Thanks a lot 
> > Anthony Y 
> > make[1]: Leaving directory `/home/new/or1k/mp3/sw/mad-xess' 
> > -- > View this message in context: > 
>
http://www.nabble.com/OR1200-porting-MP3-problem-tp18299825p18299825.html 
> > Sent from the OpenCores - RISC mailing list archive at 
> Nabble.com. > > 
> _______________________________________________ 
> http://www.opencores.org/mailman/listinfo/openrisc 
> 
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