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    Navigation: All forums > Openrisc > Message List > Message Post

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    From: liuzg305 at 126.com<liuzg305@1...>
    Date: Wed Mar 12 16:41:59 CET 2008
    Subject: [openrisc] or1200 data cache
    Top
    Hi all,

    I have some questions about or1200 data cache:
    1.Does or1200 cache all memory access including registers in the
    wishbone slave module when enable the data cache?

    2.When I enable the or1200 data cache when power up, do I need to
    disable first when want to read the data from uart?

    3.I can run the or1k linux2.4 when I disable the data cache.But when I
    enable the data cache,the or1k linux2.4 can not boot up
    successfully.What is the matter?

    Thanks!
    Gary

    Follow upAuthor
    [openrisc] or1200 data cacheAndreas Ehliar

     
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