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Dimitrios Orfanos wrote:

Hi,
Some other questions have arisen.
1) What execution model does or32-elf-sim is configured to use.
2)What is the role of the srand that is called in the toplevel.c I have 
searched for the rand but I didn't find it.
3)What is the role of the scheduler. I have noticed that it calls some 
functions irrelevant of the code that is loaded with loadcode function. And 
that these functions have to do only with the peripherals and do not 
contribute to sum of cycles of simulation. Is that true?
4)The only variable which actually holds the CPU cycles that are consumed for 
the execution of the program is runtime.sim.cycles. And this variable is only 
affected by the accesses in the memory (apart from cache and TLB which are 
disabled in my sim.cfg).Is that true?

All the answers to my questions will help me for the modification of the 
simulator to give cycles per instruction information. But as I have noticed 
the commands that are simulated do not consume cycles in any execution stage. 
It is hypothesised that after the fetch stage the instruction is executed 
immediately and does not consumes time in the ALU for example. So if I would 
like to give cycles per instruction information I have to define arbitrary 
how much  time is consumed in every functional unit of the processor.
Is that truth?

Thank you 
DO
On Friday 23 November 2007 18:20:50 Mark wrote:
> Dimitrios Orfanos wrote:
> > Hi,
> >
> > I am trying to modify or1ksim 0.2.0 in order to produce statistics about
> > the cycles that are consumed per instruction. In the code are defined
> > three different modes of execution the DYNAMIC, the COMPLEX and the
> > SIMPLE. Can you explain me the difference?
> >
> > DO
>
> I don't actually know the difference, but here's what I would guess
> based on looking at the code.
>
> SIMPLE_EXECUTION: slow instruction decoding (the automata for matching
> opcodes are executed at runtime)
> COMPLEX_EXECUTION: fast instruction decoding (a fast decoder is
> generated from the automata and compiled into the simulator)
> DYNAMIC_EXECUTION: instructions are dynamically recompiled from or32
> opcodes to opcodes for the host architecture (i386-only, I think)
>
> The relevant source seems to be concentrated in cpu/or32/execute.c,
> cpu/or32/generate.c, cpu/or32/insnset.c, cpu/or32/dyngen*
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