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Message
From: Matjaz Breskvar<phoenix@o...>
Date: Tue Sep 27 22:10:06 CEST 2005
Subject: [openrisc] or1ksim rc1
I think this is still missing in the cvs...regards,
p.
* Gy?rgy 'nog' Jeney (nog@s...) wrote:
> > * Gy?rgy 'nog' Jeney (nog@s...) wrote:
> >
> > > This fails 'cause RAW_RANGE_STATS was being defined to 1 in config.h, despite
> > > you not giveing configure the --enable-range-stats option (I think). I've fixed
> > > this in the attached patch. Other than this it looks good.
> >
> > patch is ok, but:
> >
> > In file included from execute.c:709:
> > execgen.c: In function 'decode_execute':
> > execgen.c:2995: error: invalid lvalue in assignment
> > execgen.c:3019: error: invalid lvalue in assignment
> > execgen.c:3050: error: invalid lvalue in assignment
> > execgen.c:3074: error: invalid lvalue in assignment
> > execgen.c:3105: error: invalid lvalue in assignment
> > execgen.c:3136: error: invalid lvalue in assignment
> > execgen.c:3167: error: invalid lvalue in assignment
> > execgen.c:4795: error: invalid lvalue in assignment
> > execgen.c:4818: error: invalid lvalue in assignment
> > execgen.c:4850: error: invalid lvalue in assignment
> > execgen.c:4882: error: invalid lvalue in assignment
> >
> > it seams that gcc-4.x doesn't like things like:
> >
> > (signed)b += (signed)cpu_state.reg[(insn >> 16) & 0x1f];
>
> Damn, I left this piece of from one of the patches. This should fix it.
>
> nog.
> diff -uNrp --unidirectional-new-file ./cpu/or32/generate.c ../or1ksim-ac/cpu/or32/generate.c
> --- ./cpu/or32/generate.c 2005-03-31 17:59:32.000000000 +0200
> +++ ../or1ksim-ac/cpu/or32/generate.c 2005-07-20 15:47:50.000000000 +0200
> @@ -193,7 +193,7 @@ gen_eval_operands (FILE *fo, int insn_in
> 'a' + num_ops, 1 << sbit, 'a' + num_ops,
> 0xffffffff << sbit);
> opd++;
> - shift_fprintf (level, fo, "(signed)%c += (signed)cpu_state.reg[(insn >> %i) & 0x%x];\n",
> + shift_fprintf (level, fo, "*(orreg_t *)&%c += (orreg_t)cpu_state.reg[(insn >> %i) & 0x%x];\n",
> 'a' + num_ops, opd->type & OPTYPE_SHR,
> (1 << opd->data) - 1);
> dis = 1;
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
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