OPENCORES.ORG

Hello,

Hi !
ORPSOC is more like a reference design, ie to show you how to use OR1200 in
a larger design. And it allows you to do an evaluation on a Xilinx FPGA
board.

In the near future there will be a design available that will replace ORPSOC
and will be more than just a reference design, it will be a starting point
for somebody that wants to add its own additional peripherals and take it to
an ASIC.

regards,
Damjan

----- Original Message ----- 
From: "Kory Schoenfliess" <kmschoen@n...>
To: "List about OpenRISC project" <openrisc@o...>
Sent: Tuesday, August 23, 2005 11:51 PM
Subject: [openrisc] Concerning ORP_SOC...

> Hello,
>
> After performing an analysis of the ORP_SOC architecture, specifically the
> HDL hierachy of 'xsv_fpga_top.v' and below, I have found that the VGA CRT
> controller (ssvga_top.v) requires the use of Xilnix block ram primitives.
> Has anyone implemented generically for arbitrary synthesis?
>
> Thank you,
> Kory Schoenfliess
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc