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Message
From: Matjaz Breskvar<phoenix@o...>
Date: Thu Jun 30 13:51:18 CEST 2005
Subject: [openrisc] [patch] error in sigcontextinfo.h
* Robert Millan (rmh@a...) wrote:
> On Thu, Jun 30, 2005 at 01:52:58PM +0300, Balint Cristian wrote:
> > On Thursday 30 June 2005 13:08, Robert Millan wrote:
> > > On Thu, Jun 30, 2005 at 02:48:55AM +0200, Matjaz Breskvar wrote:
> > > > * Robert Millan (rmh@a...) wrote:
> > > > > On Fri, Jun 24, 2005 at 02:05:18PM +0200, Matjaz Breskvar wrote:
> > > > > > Thank you for the report, i'll take a look at it ...
> > > > >
> > > > > Uhm.. I found that my patch is wrong. I discovered later that (ctx) is a
> > > > > pointer to struct so the -> is fine. Please excuse me for being so quick at
> > > > > sending a patch before verifying it works.
> > > > >
> > > > > The register names, however, are from powerpc and don't match or32 ones AFAIK.
> > > > >
> > > > > Shouldn't these be "pc" and "gprs" instead of "nip" and "gpr" ?
> > > >
> > > > looking at it, i would think 'pc', 'sp' and 'sp'. do you agree ?
> >
> > NIP/Next Instruction Pointer on PPC :)
> > Dont know if eq with PC/Program Counter but is possible.
>
> I take it "Next" means it points to the next instruction instead of the current
> one?
i think that nip in ppc is eqvivalent to pc in openrisc (from a sw. point of
view). in openrisc hardware though you have a notion npc (next pc) and ppc
(previous pc) if i'm not terribly mistaken... what it means can be best seen
in openrisc simulator when you step through the code...
best regards,
p.
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