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    Navigation: All forums > Openrisc > Message List > Message Post

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    From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@s...>
    Date: Wed Jun 29 16:57:51 CEST 2005
    Subject: [openrisc] [or1ksim #126] Fix exelog when mtspr causes an ITLB miss
    Top
    Hi,

    ChangeLog:
    * Fix the execution log when an mtspr instruction causes an itlb miss.

    nog.
    -------------- next part --------------
    diff -upr --unidirectional-new-file ./cpu/or32/dyn_rec.c /home/nog/or1ksim-ac/cpu/or32/dyn_rec.c
    --- ./cpu/or32/dyn_rec.c 2005-06-28 18:41:35.000000000 +0200
    +++ /home/nog/or1ksim-ac/cpu/or32/dyn_rec.c 2005-06-19 13:09:13.000000000 +0200
    @@ -461,13 +440,14 @@ void recheck_immu(int got_en_dis)
    void run_sched_out_of_line(int add_normal)
    {
    oraddr_t pc = get_pc();
    + extern int immu_ex_from_insn;

    if(!cpu_state.ts_current)
    upd_reg_from_t(pc, 0);

    if(add_normal && do_stats) {
    cpu_state.iqueue.insn_addr = pc;
    - cpu_state.iqueue.insn = eval_insn_direct(pc, 1);
    + cpu_state.iqueue.insn = eval_insn_direct(pc, !immu_ex_from_insn);
    cpu_state.iqueue.insn_index = insn_decode(cpu_state.iqueue.insn);
    runtime.cpu.instructions++;
    analysis(&cpu_state.iqueue);

     
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