|
Message
From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@s...>
Date: Wed Jun 29 16:57:09 CEST 2005
Subject: [openrisc] [or1ksim #123] Check OR32_IF_DELAY
Hi,ChangeLog: * Check OR32_IF_DELAY instead of it_jump || it_branch.
nog. -------------- next part -------------- diff -upr --unidirectional-new-file ./cpu/or32/dyn_rec.c /home/nog/or1ksim-ac/cpu/or32/dyn_rec.c --- ./cpu/or32/dyn_rec.c 2005-05-29 11:54:30.000000000 +0200 +++ /home/nog/or1ksim-ac/cpu/or32/dyn_rec.c 2005-06-19 13:09:13.000000000 +0200 @@ -736,8 +716,7 @@ static void recompile_insn(struct op_que /* If we are recompileing an instruction that has a delay slot and is in the * delay slot, ignore it. This is undefined behavour. */ - if(delay_insn && ((or32_opcodes[insn_index].func_unit == it_jump) || - (or32_opcodes[insn_index].func_unit == it_branch))) + if(delay_insn && (or32_opcodes[insn_index].flags & OR32_IF_DELAY)) return; /* figure out instruction operands */ @@ -774,10 +753,9 @@ static void recompile_insn(struct op_que } /* Jump instructions are special since they have a delay slot and thus they - * need to control the exact operation sequence. Special case these, here to - * avoid haveing loads of if(.func_unit != it_jump && != it_branch) below */ - if((or32_opcodes[insn_index].func_unit == it_jump) || - (or32_opcodes[insn_index].func_unit == it_branch)) { + * need to control the exact operation sequence. Special case these here to + * avoid haveing loads of if(!(.& OR32_IF_DELAY)) below */ + if(or32_opcodes[insn_index].flags & OR32_IF_DELAY) { /* Ship the jump-to register out (if it exists). It requires special * handleing, which is done in gen_j_reg. */ for(i = 0; i < NUM_T_REGS; i++) {
|
 |