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    Navigation: All forums > Openrisc > Message List > Message Post

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    From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@s...>
    Date: Wed Jun 29 16:57:00 CEST 2005
    Subject: [openrisc] [or1ksim #122] Bring config files up-to-date
    Top
    Hi,

    ChangeLog:
    * Bring config files up-to-date with recent changes.

    nog.
    -------------- next part --------------
    diff -upr --unidirectional-new-file ./testbench/acv_gpio.cfg /home/nog/or1ksim-ac/testbench/acv_gpio.cfg
    --- ./testbench/acv_gpio.cfg 2005-03-31 16:39:44.000000000 +0200
    +++ /home/nog/or1ksim-ac/testbench/acv_gpio.cfg 2005-06-04 12:57:30.000000000 +0200
    @@ -4,24 +4,32 @@ section memory
    pattern = 0x00
    type = unknown /* Fastest */

    - nmemories = 2
    - device 0
    - name = "RAM"
    - ce = 0
    - baseaddr = 0x00000000
    - size = 0x00200000
    - delayr = 10
    - delayw = -1
    - enddevice
    -
    - device 1
    - name = "FLASH"
    - ce = 1
    - baseaddr = 0x40000000
    - size = 0x00200000
    - delayr = 2
    - delayw = 4
    - enddevice
    + name = "RAM"
    + ce = 1
    + baseaddr = 0x00000000
    + size = 0x00200000
    + delayr = 1
    + delayw = 1
    +end
    +
    +section memory
    + /*random_seed = 12345
    + type = random*/
    + pattern = 0x00
    + type = unknown /* Fastest */
    +
    + name = "FLASH"
    + ce = 0
    + baseaddr = 0xf0000000
    + size = 0x00200000
    + delayr = 1
    + delayw = -1
    +end
    +
    +section mc
    + enabled = 1
    + baseaddr = 0x93000000
    + POC = 0x00000008 /* Power on configuration register */
    end

    section cpu
    diff -upr --unidirectional-new-file ./testbench/acv_uart.cfg /home/nog/or1ksim-ac/testbench/acv_uart.cfg
    --- ./testbench/acv_uart.cfg 2005-03-31 16:39:44.000000000 +0200
    +++ /home/nog/or1ksim-ac/testbench/acv_uart.cfg 2005-05-22 14:01:13.000000000 +0200
    @@ -4,24 +4,26 @@ section memory
    pattern = 0x00
    type = unknown /* Fastest */

    - nmemories = 2
    - device 0
    - name = "FLASH"
    - ce = 0
    - baseaddr = 0xf0000000
    - size = 0x00200000
    - delayr = 1
    - delayw = -1
    - enddevice
    + name = "FLASH"
    + ce = 0
    + baseaddr = 0xf0000000
    + size = 0x00200000
    + delayr = 1
    + delayw = -1
    +end
    +
    +section memory
    + /*random_seed = 12345
    + type = random*/
    + pattern = 0x00
    + type = unknown /* Fastest */

    - device 1
    - name = "RAM"
    - ce = 1
    - baseaddr = 0x00000000
    - size = 0x00200000
    - delayr = 1
    - delayw = 1
    - enddevice
    + name = "RAM"
    + ce = 1
    + baseaddr = 0x00000000
    + size = 0x00200000 + delayr = 1 + delayw = 1 end section mc diff -upr --unidirectional-new-file ./testbench/mmu.cfg /home/nog/or1ksim-ac/testbench/mmu.cfg --- ./testbench/mmu.cfg 2002-08-15 23:38:26.000000000 +0200 +++ /home/nog/or1ksim-ac/testbench/mmu.cfg 2005-06-12 14:36:47.000000000 +0200 @@ -4,24 +4,26 @@ section memory pattern = 0x00 type = unknown /* Fastest */ - nmemories = 2 - device 0 - name = "RAM" - ce = 1 - baseaddr = 0x00000000 - size = 0x00200000 - delayr = 1 - delayw = 2 - enddevice - - device 1 - name = "FLASH" - ce = 0 - baseaddr = 0xf0000000 - size = 0x00200000 - delayr = 10 - delayw = -1 - enddevice + name = "RAM" + ce = 1 + baseaddr = 0x00000000 + size = 0x00200000 + delayr = 1 + delayw = 2 +end + +section memory + /*random_seed = 12345 + type = random*/ + pattern = 0x00 + type = unknown /* Fastest */ + + name = "FLASH" + ce = 0 + baseaddr = 0xf0000000 + size = 0x00200000 + delayr = 10 + delayw = -1 end section immu

     
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