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From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@s...>
Date: Wed Jun 29 16:55:01 CEST 2005
Subject: [openrisc] [or1ksim #113] Fix compile error
Hi,

Sometime I broke compileing the sim with --enable-exection=simple. This fixes
this.

ChangeLog:
* Fix compileation with --enable-execution=simple.

nog.
-------------- next part --------------
diff -upr --unidirectional-new-file ./cpu/or32/execute.c /home/nog/or1ksim-ac/cpu/or32/execute.c
--- ./cpu/or32/execute.c 2005-06-28 13:01:05.000000000 +0200
+++ /home/nog/or1ksim-ac/cpu/or32/execute.c 2005-06-12 16:18:55.000000000 +0200
@@ -729,7 +737,7 @@ static uorreg_t eval_reg(unsigned int re
return cpu_state.reg[regno];
} else {
PRINTF("\nABORT: read out of registers\n");
- sim_done()
+ sim_done();
return 0;
}
}