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From: György 'nog' Jeney<nog@s...>
Date: Sun May 29 17:53:52 CEST 2005
Subject: [openrisc] [ork1sim #102] UART: Move loopback handling out of uart_clock16 [4/6]
Hi,

Changelog says it all.

ChangeLog:
* Move loopback handling out of uart_clock16.

nog.
-------------- next part --------------
--- ../or1ksim-patch/peripheral/16450.c 2005-05-29 15:52:41.000000000 +0200
+++ peripheral/16450.c 2005-05-29 15:52:34.000000000 +0200
@@ -61,8 +61,8 @@ static void uart_vapi_cmd(void *dat);
static void uart_clear_int(struct dev_16450 *uart, int intr);
void uart_tx_send(void *dat);

-/* Number of clock cycles (one clock cycle is one call to the uart_clock())
- before a single character is transmitted or received. */
+/* Number of clock cycles (one clock cycle is when UART_CLOCK_DIVIDER simulator
+ * cycles have elapsed) before a single character is transmitted or received. */
static unsigned long char_clks(int dll, int dlh, int lcr)
{
unsigned int bauds_per_char = 2;
@@ -260,6 +260,35 @@ static void uart_clear_int(struct dev_16
SCHED_ADD(uart_next_int, uart, 0);
}

+/*----------------------------------------------------[ Loopback handling ]---*/
+static void uart_loopback(struct dev_16450 *uart)
+{
+ if(!(uart->regs.mcr & UART_MCR_LOOP))
+ return;
+
+ if((uart->regs.mcr & UART_MCR_AUX2) != ((uart->regs.msr & UART_MSR_DCD) >> 4))
+ uart->regs.msr |= UART_MSR_DDCD;
+
+ if((uart->regs.mcr & UART_MCR_AUX1) < ((uart->regs.msr & UART_MSR_RI) >> 4))
+ uart->regs.msr |= UART_MSR_TERI;
+
+ if((uart->regs.mcr & UART_MCR_RTS) != ((uart->regs.msr & UART_MSR_CTS) >> 3))
+ uart->regs.msr |= UART_MSR_DCTS;
+
+ if((uart->regs.mcr & UART_MCR_DTR) != ((uart->regs.msr & UART_MSR_DSR) >> 5))
+ uart->regs.msr |= UART_MSR_DDSR;
+
+ uart->regs.msr &= ~(UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS);
+ uart->regs.msr |= ((uart->regs.mcr & UART_MCR_AUX2) << 4);
+ uart->regs.msr |= ((uart->regs.mcr & UART_MCR_AUX1) << 4);
+ uart->regs.msr |= ((uart->regs.mcr & UART_MCR_RTS) << 3);
+ uart->regs.msr |= ((uart->regs.mcr & UART_MCR_DTR) << 5);
+
+ if(uart->regs.msr & (UART_MSR_DCTS | UART_MSR_DDSR | UART_MSR_TERI |
+ UART_MSR_DDCD))
+ uart_int_msi(uart);
+}
+
/*----------------------------------------------------[ Transmitter logic ]---*/
/* Sends the data in the shift register to the outside world */
static void send_char (struct dev_16450 *uart, int bits_send)
@@ -604,6 +633,7 @@ void uart_write_byte(oraddr_t addr, uint
break;
case UART_MCR:
uart->regs.mcr = value & UART_VALID_MCR;
+ uart_loopback(uart);
break;
case UART_SCR:
uart->regs.scr = value;
@@ -696,6 +726,7 @@ uint8_t uart_read_byte(oraddr_t addr, vo
value = uart->regs.msr & UART_VALID_MSR;
uart->regs.msr = 0;
uart_clear_int(uart, UART_IIR_MSI);
+ uart_loopback(uart);
break;
case UART_SCR:
value = uart->regs.scr;
@@ -807,48 +838,6 @@ void uart_vapi_read (unsigned long id, u
uart_vapi_cmd(uart);
}

-/* Simulation hook. Must be called every clock cycle to simulate all UART
- devices. It does internal functional UART simulation. */
-void uart_clock16 (void *dat)
-{
- struct dev_16450 *uart = dat;
-
- /* Schedule for later */
- SCHED_ADD (uart_clock16, dat, UART_CLOCK_DIVIDER);
-
- TRACE("Running uart clock:\n");
-
- /* If VAPI is not selected, UART communicates with two file streams;
- if VAPI is selected, we use VAPI streams. */
- /* if txfs is corrupted, skip this uart. */
- if (!uart->vapi_id && !channel_ok(uart->channel)) return;
-
- TRACE("\tChannel stream or VAPI checks out ok\n");
-
- /***************** Loopback *****************/
- if (uart->regs.mcr & UART_MCR_LOOP) {
- TRACE("uart_clock: Loopback\n");
- if ((uart->regs.mcr & UART_MCR_AUX2) !=
- ((uart->regs.msr & UART_MSR_DCD) >> 4))
- uart->regs.msr |= UART_MSR_DDCD;
- if ((uart->regs.mcr & UART_MCR_AUX1) <
- ((uart->regs.msr & UART_MSR_RI) >> 4))
- uart->regs.msr |= UART_MSR_TERI; - if ((uart->regs.mcr & UART_MCR_RTS) != - ((uart->regs.msr & UART_MSR_CTS) >> 3)) - uart->regs.msr |= UART_MSR_DCTS; - if ((uart->regs.mcr & UART_MCR_DTR) != - ((uart->regs.msr & UART_MSR_DSR) >> 5)) - uart->regs.msr |= UART_MSR_DDSR; - uart->regs.msr &= ~(UART_MSR_DCD | UART_MSR_RI - | UART_MSR_DSR | UART_MSR_CTS); - uart->regs.msr |= ((uart->regs.mcr & UART_MCR_AUX2) << 4); - uart->regs.msr |= ((uart->regs.mcr & UART_MCR_AUX1) << 4); - uart->regs.msr |= ((uart->regs.mcr & UART_MCR_RTS) << 3); - uart->regs.msr |= ((uart->regs.mcr & UART_MCR_DTR) << 5); - } -} - /* Reset. It initializes all registers of all UART devices to zero values, (re)opens all RX/TX file streams and places devices in memory address space. */ @@ -914,7 +903,6 @@ void uart_reset(void *dat) uart->vapi_buf_tail_ptr = 0; memset(uart->vapi_buf, 0, sizeof(uart->vapi_buf)); - SCHED_ADD (uart_clock16, dat, UART_CLOCK_DIVIDER); uart_sched_recv_check(uart); }