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    Navigation: All forums > Openrisc > Message List > Message Post

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    From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@s...>
    Date: Fri Apr 22 20:35:21 CEST 2005
    Subject: [openrisc] [or1ksim #82] Fix instruction counter
    Top
    Hi,

    I broke the instruction counter in the simple/complex execution models when an
    ITLB miss or a IPF occured. This fixes it.

    ChangeLog:
    * Fix instruction counter.

    nog.
    -------------- next part --------------
    --- cpu/or32/execute.c 2005-03-31 16:37:12.000000000 +0200
    +++ /home/nog/or1ksim-ac/cpu/or32/execute.c 2005-04-22 18:01:01.000000000 +0200
    @@ -281,11 +281,12 @@
    }

    breakpoint = 0;
    + cpu_state.iqueue.insn_addr = cpu_state.pc;
    + cpu_state.iqueue.insn = eval_insn (cpu_state.pc, &breakpoint);
    +
    /* Fetch instruction. */
    if (!except_pending)
    runtime.cpu.instructions++;
    - cpu_state.iqueue.insn_addr = cpu_state.pc;
    - cpu_state.iqueue.insn = eval_insn (cpu_state.pc, &breakpoint);

    /* update_pc will be called after execution */

     
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