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    Navigation: All forums > Openrisc > Message List > Message Post

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    From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@n...>
    Date: Thu Mar 24 21:08:36 CET 2005
    Subject: [openrisc] [or1ksim #34] Make the uart use the new trace functions
    Top
    Hi,

    This changes the uart peripheral to use the new trace functions. This
    peripheral is now debugable.

    ChangeLog:
    * Make uart use the new trace functions.

    nog.
    -------------- next part --------------
    --- peripheral/16450.c 2005-03-21 20:52:00.000000000 +0100
    +++ /home/nog/or1ksim-split/peripheral/16450.c 2005-03-21 20:58:37.000000000 +0100
    @@ -48,6 +48,8 @@
    #include "channel.h"
    #include "debug.h"

    +DEFAULT_DEBUG_CHANNEL(uart);
    +
    #define MIN(a,b) ((a) < (b) ? (a) : (b))

    /* Number of clock cycles (one clock cycle is one call to the uart_clock())
    @@ -79,13 +81,15 @@
    {
    struct dev_16450 *uart = dat;

    - debug(4, "uart_write_byte(%"PRIxADDR",%02"PRIx32")\n", addr, value);
    + TRACE("uart_write_byte(%"PRIxADDR",%02"PRIx32")\n", addr, value);

    if (uart->regs.lcr & UART_LCR_DLAB) {
    switch (addr % UART_ADDR_SPACE) {
    case UART_DLL:
    uart->regs.dll = value;
    uart->char_clks = char_clks(uart->regs.dll, uart->regs.dlh, uart->regs.lcr);
    + TRACE("\tSetting char_clks to %li (%02x, %02x, %02x)\n", uart->char_clks,
    + uart->regs.dll, uart->regs.dlh, uart->regs.lcr);
    return;
    case UART_DLH:
    uart->regs.dlh = value;
    @@ -140,7 +144,7 @@
    uart->regs.scr = value;
    break;
    default:
    - debug(1, "write out of range (addr %x)\n", addr);
    + TRACE("write out of range (addr %x)\n", addr);
    }
    }

    @@ -150,17 +154,17 @@
    struct dev_16450 *uart = dat;
    uint8_t value = 0;

    - debug(4, "uart_read_byte(%"PRIxADDR")", addr);
    + TRACE("uart_read_byte(%"PRIxADDR")", addr);

    if (uart->regs.lcr & UART_LCR_DLAB) {
    switch (addr % UART_ADDR_SPACE) {
    case UART_DLL:
    value = uart->regs.dll;
    - debug(4, "= %"PRIx8"\n", value);
    + TRACE("= %"PRIx8"\n", value);
    return value;
    case UART_DLH:
    value = uart->regs.dlh;
    - debug(4, "= %"PRIx8"\n", value);
    + TRACE("= %"PRIx8"\n", value);
    return value;
    }
    }
    @@ -169,11 +173,11 @@
    case UART_RXBUF:
    { /* Print out FIFO for debugging */
    int i;
    - debug(4, "(%i/%i,%i,%i:", uart->istat.rxbuf_full, uart->fifo_len,
    - uart->istat.rxbuf_head, uart->istat.rxbuf_tail);
    + TRACE("(%i/%i, %i, %i:", uart->istat.rxbuf_full, uart->fifo_len,
    + uart->istat.rxbuf_head, uart->istat.rxbuf_tail);
    for (i = 0; i < uart->istat.rxbuf_full; i++)
    - debug(4, "%02x ", uart->regs.rxbuf[(uart->istat.rxbuf_tail + i) % uart->fifo_len]);
    - debug(4, ")");
    + TRACE("%02x ", uart->regs.rxbuf[(uart->istat.rxbuf_tail + i) % uart->fifo_len]);
    + TRACE(")");
    }
    if (uart->istat.rxbuf_full) {
    value = uart->regs.rxbuf[uart->istat.rxbuf_tail];
    @@ -216,9 +220,9 @@
    value = uart->regs.scr;
    break;
    default:
    - debug(1, "read out of range (addr %"PRIxADDR")\n", addr);
    + TRACE("read out of range (addr %"PRIxADDR")\n", addr);
    }
    - debug(4, " = %"PRIx8"\n", value);
    + TRACE(" = %"PRIx8"\n", value);
    return value;
    }

    @@ -226,7 +230,7 @@
    void uart_vapi_read (unsigned long id, unsigned long data, void *dat)
    {
    struct dev_16450 *uart = dat;
    - debug(4, "UART: id %08lx, data %08lx\n", id, data);
    + TRACE("UART: id %08lx, data %08lx\n", id, data);
    uart->vapi_buf[uart->vapi_buf_head_ptr] = data; uart->vapi_buf_head_ptr = (uart->vapi_buf_head_ptr + 1) % UART_VAPI_BUF_LEN; if (uart->vapi_buf_tail_ptr == uart->vapi_buf_head_ptr) { @@ -238,7 +242,7 @@ static void send_char (struct dev_16450 *uart, int bits_send) { PRINTF ("%c", (char)uart->iregs.txser); - debug(4, "TX \'%c\' via UART at %"PRIxADDR"...\n", (char)uart->iregs.txser, + TRACE("TX \'%c\' via UART at %"PRIxADDR"...\n", (char)uart->iregs.txser, uart->baseaddr); if (uart->regs.mcr & UART_MCR_LOOP) uart->iregs.loopback = uart->iregs.txser; @@ -297,10 +301,10 @@ if (uart->vapi.lcr & UART_LCR_STOP) fe |= ((packet >> (nbits++)) & 1) ^ 1; - debug (4, "lcr vapi %02x, uart %02x\n", uart->vapi.lcr, uart->regs.lcr); + TRACE ("lcr vapi %02x, uart %02x\n", uart->vapi.lcr, uart->regs.lcr); data |= (uart->vapi.lcr << 8) | (pe << 16) | (fe << 17) | (uart->vapi.lcr << 8); PRINTF ("vapi_send (%08lx, %08x)\n", uart->vapi_id, data); - debug (4, "vapi_send (%08lx, %08x)\n", uart->vapi_id, data); + TRACE ("vapi_send (%08lx, %08x)\n", uart->vapi_id, data); vapi_send (uart->vapi_id, data); } else { char buffer[1] = { uart->iregs.txser & 0xFF }; @@ -318,7 +322,7 @@ if (uart->istat.rxbuf_full + 1 > uart->fifo_len) uart->regs.lsr |= UART_LSR_OVRRUN | UART_LSR_RXERR; else { - debug(4, "add %02x\n", ch); + TRACE("add %02x\n", ch); uart->regs.rxbuf[uart->istat.rxbuf_head] = ch; uart->istat.rxbuf_head = (uart->istat.rxbuf_head + 1) % uart->fifo_len; uart->istat.rxbuf_full++; @@ -336,11 +340,15 @@ /* Schedule for later */ SCHED_ADD (uart_clock16, dat, UART_CLOCK_DIVIDER); + + TRACE("Running uart clock:\n"); /* If VAPI is not selected, UART communicates with two file streams; if VAPI is selected, we use VAPI streams. */ /* if txfs is corrupted, skip this uart. */ if (!uart->vapi_id && !channel_ok(uart->channel)) return; + + TRACE("\tChannel stream or VAPI checks out ok\n"); if (uart->vapi.next_break_cnt >= 0) if (--uart->vapi.next_break_cnt < 0) { @@ -349,6 +357,9 @@ } /***************** Transmit *****************/ + TRACE("\tuart->istat.txser_full = %i\n", uart->istat.txser_full); + TRACE("\tuart->istat.txbuf_full = %i\n", uart->istat.txser_full); + TRACE("\tuart->char_clks = %li\n", uart->char_clks); if (!uart->istat.txser_full) { // uart->regs.lsr |= UART_LSR_TXBUFE; if (uart->istat.txbuf_full) { @@ -418,7 +429,7 @@ if (uart->char_clks <= uart->istat.rxser_clks++) { /* Set unused character bits to zero and allow lsr register in fifo */ uart->iregs.rxser &= ((1 << ((uart->regs.lcr & 3) + 5)) - 1) | 0xff00; - debug(4, "Receiving 0x%02lx'%c' via UART (at %"PRIxADDR"...\n", + TRACE("\tReceiving 0x%02lx'%c' via UART (at %"PRIxADDR"...\n", uart->iregs.rxser, (char)uart->iregs.rxser, uart->baseaddr); PRINTF ("%c", (char)uart->iregs.rxser); uart->istat.rxser_full = 0; @@ -456,7 +467,7 @@ while (!received) { if (uart->vapi_buf_head_ptr != uart->vapi_buf_tail_ptr) { unsigned long data = uart->vapi_buf[uart->vapi_buf_tail_ptr]; - debug(4, "Handling: %08lx (%i,%i)\n", data, uart->vapi_buf_head_ptr, + TRACE("\tHandling: %08lx (%i,%i)\n", data, uart->vapi_buf_head_ptr, uart->vapi_buf_tail_ptr); uart->vapi_buf_tail_ptr = (uart->vapi_buf_tail_ptr + 1) % UART_VAPI_BUF_LEN; switch (data >> 24) { @@ -468,7 +479,7 @@ if ((uart->vapi.lcr & ~UART_LCR_SBC) != (uart->regs.lcr & ~UART_LCR_SBC) || uart->vapi.char_clks != uart->char_clks || uart->vapi.skew < -MAX_SKEW || uart->vapi.skew > MAX_SKEW) { - debug (3, "WARNING: unmatched VAPI (%02x) and uart (%02x) modes.\n", + WARN("WARNING: unmatched VAPI (%02x) and uart (%02x) modes.\n", uart->vapi.lcr & ~UART_LCR_SBC, uart->regs.lcr & ~UART_LCR_SBC); /* Set error bits */ uart->iregs.rxser |= (UART_LSR_FRAME | UART_LSR_RXERR) << 8; @@ -492,7 +503,7 @@ uart->vapi.next_break = (data >> 16) & 1; break; default: - debug (0, "WARNING: Invalid vapi command %02lx\n", data >> 24); + WARN ("WARNING: Invalid vapi command %02lx\n", data >> 24); break; } } else break; @@ -502,7 +513,7 @@ /***************** Loopback *****************/ if (uart->regs.mcr & UART_MCR_LOOP) { - debug(5, "uart_clock: Loopback\n"); + TRACE("uart_clock: Loopback\n"); if ((uart->regs.mcr & UART_MCR_AUX2) != ((uart->regs.msr & UART_MSR_DCD) >> 4)) uart->regs.msr |= UART_MSR_DDCD; @@ -556,7 +567,7 @@ uart->regs.iir = UART_IIR_MSI; } if (!(uart->regs.iir & UART_IIR_NO_INT)) { - debug (4, "uart->regs.iir = %i\t", uart->regs.iir); + TRACE("\tuart->regs.iir = %i\t", uart->regs.iir); report_interrupt(uart->irq); } } @@ -574,11 +585,11 @@ else uart->channel = channel_init(uart->channel_str); if(channel_open(uart->channel) < 0) { - debug (0, "WARNING: UART has problems with channel \"%s\".\n", uart->channel_str); + WARN ("WARNING: UART has problems with channel \"%s\".\n", uart->channel_str); } else if (config.sim.verbose) PRINTF("UART at 0x%"PRIxADDR" uses ", uart->baseaddr); } else { - debug (0, "WARNING: UART at %"PRIxADDR" has no vapi nor channel specified\n", uart->baseaddr); + WARN ("WARNING: UART at %"PRIxADDR" has no vapi nor channel specified\n", uart->baseaddr); } if (uart->uart16550) --- support/dbchs.h 2005-03-21 20:52:00.000000000 +0100 +++ /home/nog/or1ksim-split/support/dbchs.h 2005-03-21 20:57:55.000000000 +0100 @@ -20,3 +20,4 @@ /* Declatrations of all debug channels */ DECLARE_DEBUG_CHANNEL(sched) +DECLARE_DEBUG_CHANNEL(uart)

     
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